Circuit Note CN-0407 Devices Connected/Referenced Femtoampere Input Bias Current ADA4530-1 Electrometer Amplifier Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta AD7172-2 ADC with True Rail-to-Rail Buffers Ultralow Noise, High Accuracy, Voltage ADR4525 Reference Circuits from the Lab reference designs are engineered and 36 V, 1 A, Synchronous, Step-Down, tested for quick and easy system integration to help solve todays ADP2442 DC-to-DC Regulator with External Clock analog, mixed-signal, and RF design challenges. For more Synchronization information and/or support, visit www.analog.com/CN0407. 2.1 On Resistance, 15 V/+12 V/5 V, ADG1419 iCMOS SPDT Switch 20 V, 200 mA, Low Noise, CMOS LDO ADP7118 Linear Regulator 28 V, 200 mA, Low Noise, Linear ADP7182 Regulator 3.75 kV, 7-Channel, SPIsolator Digital ADuM3151 Isolators for SPI Ultrahigh Sensitivity Femtoampere Measurement Platform The EVAL-CN0407-SDPZ provides a reference design for real- EVALUATION AND DESIGN SUPPORT world application by partitioning the system into a low leakage Circuit Evaluation Boards mezzanine board and a data acquisition board. The input signal CN-0407 Circuit Evaluation Board (EVAL-CN0407-SDPZ), conditioning is implemented with the ADA4530-1 on the Consists of Two Boards mezzanine board. The ADA4530-1 is an electrometer-grade Low Leakage Mezzanine Board (EVAL-CN0407-1-SDPZ) amplifier with ultralow input bias current of 20 fA maximum at Data Acquisition Board (EVAL-CN0407-2-SDPZ) System Demonstration Platform (EVAL-SDP-CS1Z) 85C. A guard buffer is integrated on the chip to isolate the Design and Integration Files input pins from leakage to the printed circuit board (PCB). The Schematics, Layout Files, Bill of Materials default amplifier configuration is in the transimpedance mode with a 10 G glass resistor and a metal shield that prevents CIRCUIT FUNCTION AND BENEFITS leakage current from entering any of the high impedance paths on The system functional diagram in Figure 1 is a precision analog the board. In addition, the mezzanine board includes unpopulated front end for measurement of current down to the femtoampere resistor and capacitor pads to allow prototyping with surface- range. This industry-leading solution is ideal for chemical mount feedback resistors as well as other input configurations. analyzers and laboratory grade instrument where an ultrahigh The data acquisition board uses an AD7172-2 24-bit - sensitivity analog front end is required for signal conditioning analog-to-digital-converter (ADC) and is powered from a single current output sensors such as photodiodes, photomultiplier 9 V dc supply. The on-board supply generates all necessary tubes, and Faraday cups. Applications that can use this solution voltages required to power both boards. The board connects to include mass spectrometry, chromatography, and coulometry. a PC via the SDP-S board (EVAL-SDP-CS1Z) and uses digital isolation to prevent noise from the USB bus or ground loops from degrading low current measurements. Rev. A Circuits from the Lab reference designs from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. determining its suitability and applicability for your use and application. Accordingly, in no event shall Tel: 781.329.4700 www.analog.com Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) Fax: 781.461.3113 20172019 Analog Devices, Inc. All rights reserved. CN-0407 Circuit Note 9V J1 POWER SUPPLIES +2.5V V V IN OUT ADR4525 +5V 5V +3.3V +2.5V 2.5V GND 2.5V ISOLATION 10G GLASS BARRIER RESISTOR +2.5V P2 J4 +3.3V +3.3V SDP +3.3V RESISTOR +5V NETWORK <5ppm/C ADG1419 J1 V V DD2 DD1 MATCHING CS SSS MSS 10k AIN0 ADA4530-1 SCLK SPI SCLK MCLK + SMA 10k 10nF 5V AD7172-2 DIN SI MO TO SDP BOARD GUARD J5 DOUT SO MI AIN1 EN ADCOFFSETCAL V V SYNC OA IA GND GND 2 1 5k 10nF LOW LEAKAGE MEZZANINE BOARD ADuM3151 2.5V (EVAL-CN0407-1-SDPZ) GND SDP EN ADCOFFSETCAL DATA ACQUISITION BOARD (EVAL-CN0407-2-SDPZ) Figure 1. Femtoampere Measurement System Functional Diagram (All Connections and Decoupling Not Shown) Figure 2 shows the board layers stackup. All of the sensitive traces CIRCUIT DESCRIPTION are on the top layer, surrounded by guard traces, vias, and planes. Low Leakage Mezzanine Board (EVAL-CN0407-1-SDPZ) 4 LAYER STACKUP The mezzanine board (EVAL-CN0407-1-SDPZ) is built on a TOP SILKSCREEN hybrid FR-4 and Rogers 4350B laminate for the lowest possible TOP SOLDERMASK current leakage. The outer two layers are ceramic (Rogers 4350B), TOP COPPER NOMINAL ROGERS 4350B and the inner layer is a standard glass epoxy laminate (FR-4). FINISHED INNER COPPER 1 FR408 BOARD The Rogers 4350B material provides superior insulation INNER COPPER 2 THICKNESS ROGERS 4350B 0.062 10% BOTTOM COPPER resistance in the presence of humidity when compared to glass BOTTOM SOLDERMASK or epoxy materials. It also minimizes current leakage and has BOTTOM SILKSCREEN much shorter dielectric relaxation times than glass or epoxy Figure 2. Mezzanine Board Layers Stackup dielectrics. For more information on dielectric relaxation, see the ADA4530-1 data sheet. Rev. A Page 2 of 8 AVSS AVDD1 REF AVDD2 DGND REF+ GPIO0 IOVDD 15282-002 15282-001