GaAs, SPDT Switch, Nonreflective, 0.1 GHz to 20 GHz Data Sheet HMC347A FEATURES FUNCTIONAL BLOCK DIAGRAM B A Broadband frequency range: 0.1 GHz to 20 GHz 3 45 A B Nonreflective, 50 design RFC 2 6 Low insertion loss: 2.0 dB to 20 GHz High isolation: 40 dB to 20 GHz High input linearity RF1 RF2 1 7 Input P1dB: 29 dBm typical Input IP3: 45 dBm typical 50 50 10 A 9BA8 High power handling 27 dBm through path Figure 1. 25 dBm terminated path 10-pad, 1.22 mm 0.85 mm 0.1 mm, CHIP APPLICATIONS Test instrumentations Microwave radio(s) and very small aperture terminals (VSATs) Military radios, radars, electronic counter measure (ECMs) Broadband telecommunications systems GENERAL DESCRIPTION The HMC347A is a broadband, nonreflective, gallium arsenide The switch operates with two negative control voltage inputs (GaAs), pseudomorphic high electron mobility transistor (VCTL = 5 V/0 V) and requires no supply. All electrical perfor- (pHEMT), single-pole, double throw (SPDT), monolithic micro- mance data is acquired with the RFx pads of the HMC347A wave integrated circuit (MMIC) chip. The switch operates from connected to 50 transmission lines via one 3.0 mil 0.5 mil 0.1 GHz to 20 GHz with an insertion loss of <2.0 dB and an iso- ribbon of minimal length. lation of >40 dB due to the implementation of on-chip, via hole structures. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20092020 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 13910-001HMC347A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Interface Schematics .....................................................................5 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................6 Functional Block Diagram .............................................................. 1 Insertion Loss, Return Loss, and Isolation ................................6 General Description ......................................................................... 1 Input P1dB, Input P0.1dB, and Input IP3) ................................7 Revision History ............................................................................... 2 Theory of Operation .........................................................................8 Specif icat ions ..................................................................................... 3 Applications Information .................................................................9 Absolute Maximum Ratings ............................................................ 4 Mounting and Bonding Techniques ...........................................9 Thermal Resistance ...................................................................... 4 Assembly Diagram ..................................................................... 10 ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 11 Pin Configuration and Function Descriptions ............................. 5 Ordering Guide .......................................................................... 11 REVISION HISTORY 1/2020Rev. A to Rev. B Deleted Bias Voltage & Current Table, TTL/CMOS Control Changes to Features Section, Figure 1, and General Description Voltage Table, and Truth Table ........................................................ 3 Section ................................................................................................ 1 Changes to Table 2 ............................................................................. 4 Changes to Table 1 ............................................................................ 3 Added Power Derating Curve Section and Figure 2 Changes to Table 3 and Table 4 ....................................................... 4 Renumbered Sequentially ................................................................ 4 Changes to Figure 2 and Table 4 ..................................................... 5 Added Figure 4 ................................................................................... 5 Changes to Theory of Operation Section ...................................... 8 Deleted GND Interface Schematic Figure and TTL Interface Circuit Figure ..................................................................................... 5 Changes to Table 3 and Figure 5 ...................................................... 5 This Hittite Microwave Products data sheet has been reformatted to Added Table 4 Renumbered Sequentially ..................................... 8 meet the styles and standards of Analog Devices, Inc. Added Theory of Operation Section .............................................. 8 3/2017Rev. 02.0317 to Rev. A Added Applications Information Section, Figure 14, Figure 15, Updated Format .................................................................. Universal and Assembly Diagram Section ....................................................... 9 Changes to Features Section, Figure 1, and General Description Updated Outline Dimensions ....................................................... 10 Section ................................................................................................ 1 Updated Ordering Guide .............................................................. 10 Changed V = 5 V to V = 5 V to 3 V, Table 1 ..................... 3 SS SS Changes to Table 1 ............................................................................ 3 Rev. B Page 2 of 11