0.1 GHz to 18 GHz, GaAs SP4T Switch Data Sheet HMC641A FEATURES FUNCTIONAL BLOCK DIAGRAM RF1 RF2 Broadband frequency range: 0.1 GHz to 18 GHz Nonreflective 50 design HMC641A Low insertion loss: 2.1 dB to 12 GHz GND High isolation: 42 dB to 12 GHz 50 50 High input linearity CTRLA RFC P1dB: 25 dBm typical at V = 5 V SS CTRLB IP3: 41 dBm typical High power handling at V = 5 V V SS SS 50 50 24 dBm through path 23 dBm terminated path Integrated 2 to 4 line decoder RF4 RF3 8-pad, 1.92 mm 1.60 mm 0.102 mm, CHIP Figure 1. APPLICATIONS Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, and electronic counter measures (ECMs) Broadband telecommunications systems GENERAL DESCRIPTION The HMC641A is a nonreflective, single-pole, four-throw The switch operates with a negative supply voltage of 5 V to (SP4T) switch, manufactured using a gallium arsenide (GaAs) 3 V and requires two negative logic control voltages. process. This switch typically provides low insertion loss of All electrical performance data is acquired with the HMC641A 2.1 dB and high isolation of 42 dB in broadband frequency that all RFx pads are connected to by the 50 transmission range from 0.1 GHz to 18 GHz. lines via one 3.0 mil 0.5 mil ribbon bond of minimal length. The HMC641A includes an on-chip, binary 2 to 4 line decoder that provides control from two logic input lines. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 2 TO 4 LINE DECODER 15148-001HMC641A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications ....................................................................................... 1 Insertion Loss, Return Loss, and Isolation ................................6 Functional Block Diagram .............................................................. 1 Input Power Compression (P1dB) and Third-Order Intercept (IP3) ................................................................................................7 General Description ......................................................................... 1 Theory of Operation .........................................................................8 Revision History ............................................................................... 2 Applications Information .................................................................9 Specifications ..................................................................................... 3 Mounting and Bonding Techniques ...........................................9 Absolute Maximum Ratings ............................................................ 4 Assembly Diagram ........................................................................9 Power Derating Curve ................................................................. 4 Outline Dimensions ....................................................................... 10 ESD Caution .................................................................................. 4 Ordering Guide .......................................................................... 10 Pin Configuration and Function Descriptions ............................. 5 Interface Schematics..................................................................... 5 REVISION HISTORY 10/2018Rev. C to Rev. D Added Power Derating Curve Section and Figure 2 Updated Outline Dimensions ....................................................... 10 Renumbered Sequentially ................................................................ 4 Added Figure 4 ..................................................................................5 This Hittite Microwave Products data sheet has been reformatted to Deleted GND Interface Schematic Figure and TTL Interface meet the styles and standards of Analog Devices, Inc. Circuit Figure .....................................................................................5 3/2017Rev. 02.0316 to Rev. C Changes to Table 3 and Figure 5...................................................... 5 Updated Format .................................................................. Universal Added Table 4 Renumbered Sequentially ..................................... 8 Changes to Features Section, Figure 1, and General Description Added Theory of Operation Section .............................................. 8 Section ................................................................................................ 1 Added Applications Information Section, Figure 14, Figure 15, Changed VSS = 5 V to VSS = 5 V to 3 V, Table 1 ..................... 3 and Assembly Diagram Section ....................................................... 9 Changes to Table 1 ............................................................................ 3 Updated Outline Dimensions ....................................................... 10 Deleted Bias Voltage & Current Table, TTL/CMOS Control Updated Ordering Guide .............................................................. 10 Voltage Table, and Truth Table ....................................................... 3 Changes to Table 2 ............................................................................ 4 Rev. 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