0.1 GHz to 33 GHz,1 dB LSB, 5-Bit, GaAs Digital Attenuator Data Sheet HMC939ATCPZ-EP FEATURES FUNCTIONAL BLOCK DIAGRAM Attenuation range: 1 dB LSB steps to 31 dB 24 23 22 21 20 19 Insertion loss: 6 dB typical at 33 GHz Attenuation accuracy: 0.5 dB 18 VDD VSS 1 Input linearity 0.1 dB compression (P0.1dB): 24 dBm typical NIC 2 17 NIC 3rd-order intercept (IP3): 40 dBm typical NIC 3 16 NIC Power handling: 27 dBm maximum DRIVER Dual-supply operation: 5 V 2dB 4dB 8dB 16dB NIC 4 15 NIC CMOS-/TTL-compatible parallel control 24-lead, 4 mm 4 mm LFCSP package RF1 5 14 RF2 ENHANCED PRODUCT FEATURES NIC 6 13 NIC Supports defense and aerospace applications (AQEC standard) 7 8 9 10 11 12 Military temperature range: 55C to +125C PACKAGE Controlled manufacturing baseline BASE One assembly/test site GND NIC = NO INTERNAL CONNECTION One fabrication site Enhanced product change notification Figure 1. Qualification data available on request APPLICATIONS Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, electronic counter measures (ECMs) Broadband telecommunications systems GENERAL DESCRIPTION The HMC939ATCPZ-EP is a 5-bit digital attenuator with a 31 dB The HMC939ATCPZ-EP comes in a RoHS compliant, compact, attenuation control range in 1 dB steps. 4 mm 4 mm LFCSP package. The HMC939ATCPZ-EP offers optimum insertion loss, Additional application and technical information can be found attenuation accuracy, and input linearity over the specified in the HMC939ALP4E data sheet. frequency range from 100 MHz to 33 GHz. The HMC939ATCPZ-EP requires dual-supply voltages, V = 5 V and V = 5 V, and provides a complementary metal DD SS oxide semiconductor (CMOS)-/transistor to transistor level (TTL)-compatible parallel control interface by incorporating an on-chip driver. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. NIC P0 NIC P1 NIC P2 NIC P3 NIC P4 NIC NIC 16267-001HMC939ATCPZ-EP Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Power Derating Curve ..................................................................4 Enhanced Product Features ............................................................ 1 ESD Caution...................................................................................4 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions ..............................5 Functional Block Diagram .............................................................. 1 Interface Schematics .....................................................................6 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................7 Revision History ............................................................................... 2 Outline Dimension ............................................................................8 Specifications ..................................................................................... 3 Ordering Guide .............................................................................8 Absolute Maximum Ratings ............................................................ 4 Thermal Resistance ...................................................................... 4 REVISION HISTORY 10/2017Revision 0: Initial Version Rev. 0 Page 2 of 8