LTC2162/LTC2161/LTC2160 16-Bit, 65Msps/ 40Msps/25Msps Low Power ADCs Fea T Descrip T n 77dB SNR The LTC 2162/LTC2161/LTC2160 are sampling 16-bit A/D n 90dB SFDR converters designed for digitizing high frequency, wide n Low Power: 87mW/63mW/45mW dynamic range signals. They are perfect for demanding n Single 1.8V Supply communications applications with AC performance that n CMOS, DDR CMOS, or DDR LVDS Outputs includes 77dB SNR and 90dB spurious free dynamic range n Selectable Input Ranges: 1V to 2V (SFDR). Ultralow jitter of 0.07ps allows undersampling P-P P-P RMS n 550MHz Full Power Bandwidth S/H of IF frequencies with excellent noise performance. n Optional Data Output Randomizer DC specs include 2LSB INL (typ), 0.5LSB DNL (typ) n Optional Clock Duty Cycle Stabilizer and no missing codes over temperature. The transition n Shutdown and Nap Modes noise is 3.3LSB . RMS n Serial SPI Port for Configuration n The digital outputs can be either full rate CMOS, double 48-Pin (7mm 7mm) QFN Package data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to a T range from 1.2V to 1.8V. n + Communications The ENC and ENC inputs may be driven differentially n Cellular Base Stations or single-ended with a sine wave, PECL, LVDS, TTL, or n Software Defined Radios CMOS inputs. An optional clock duty cycle stabilizer al- n Portable Medical Imaging lows high performance at full speed for a wide range of n Multichannel Data Acquisition clock duty cycles. n Nondestructive Testing L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical a T 2-Tone FFT, f = 70MHz and 69MHz 1.8V 1.8V IN V OV DD DD 0 10 20 30 16-BIT ANALOG S/H 40 ADC CORE INPUT D15 50 CMOS 60 DDR CMOS OR OUTPUT DDR LVDS 70 DRIVERS OUTPUTS D0 80 90 125MHz CLOCK 100 CONTROL CLOCK 110 120 0 10 20 30 FREQUENCY (MHz) 216210 TA01a GND OGND 2162 TA01b 216210f 1 AMPLITUDE (dBFS) ion pplica ions pplica ion uresLTC2162/LTC2161/LTC2160 a Te Maxi Mu M r a T (Notes 1, 2) Supply Voltages (V , O ) ....................... 0.3V to 2V Digital Output Voltage ................0.3V to (OV + 0.3V) DD VDD DD + Analog Input Voltage (A , A , PAR/SER, SENSE) Operating Temperature Range IN IN (Note 3) ................................... 0.3V to (V + 0.2V) LTC2162C, LTC2161C, LTC2160C ............. 0C to 70C DD + Digital Input Voltage (ENC , ENC , CS, SDI, SCK) LTC2162I, LTC2161I, LTC2160I ............40C to 85C (Note 4) ................................................ 0.3V to 3.9V Storage Temperature Range ..................65C to 150C SDO (Note 4) ............................................. 0.3V to 3.9V p in c F T FULL RATE CMOS OUTPUT MODE DOUBLE DATA RATE CMOS OUTPUT MODE TOP VIEW TOP VIEW V 1 36 D11 CM V 1 36 D10 11 CM + + A 2 35 D10 IN A 2 35 DNC IN A 3 34 D9 IN A 3 34 D8 9 IN GND 4 33 D8 GND 4 33 DNC REFH 5 32 OV DD REFH 5 32 OV DD REFL 6 31 OGND 49 REFL 6 49 31 OGND + + REFH 7 GND 30 CLKOUT GND REFH 7 30 CLKOUT REFL 8 29 CLKOUT REFL 8 29 CLKOUT PAR/SER 9 28 D7 PAR/SER 9 28 D6 7 GND 10 27 D6 GND 10 27 DNC GND 11 26 D5 GND 11 26 D4 5 V 12 25 D4 DD V 12 25 DNC DD UK PACKAGE UK PACKAGE 48-LEAD (7mm 7mm) PLASTIC QFN 48-LEAD (7mm 7mm) PLASTIC QFN T = 150C, = 29C/W JMAX JA T = 150C, = 29C/W JMAX JA EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB 216210f 2 48 V V 13 DD DD 47 V GND 14 DD + 46 SENSE ENC 15 45 V ENC 16 REF 44 SDO CS 17 43 GND SCK 18 42 OF SDI 19 41 DNC GND 20 40 D15 D0 21 39 D14 D1 22 38 D13 D2 23 37 D12 D3 24 48 V V 13 DD DD 47 V GND 14 DD + 46 SENSE ENC 15 45 V ENC 16 REF 44 SDO CS 17 43 GND SCK 18 42 OF SDI 19 41 DNC GND 20 40 D14 15 DNC 21 39 DNC D0 1 22 38 D12 13 DNC 23 37 DNC D2 3 24 ion igura on ings bsolu