LTC2232/LTC2233 10-Bit,105Msps/ 80Msps ADCs FEATURES DESCRIPTIO Sample Rate: 105Msps/80Msps The LTC 2232 and LTC2233 are 105Msps/80Msps, sam- 61dB SNR up to 140MHz Input pling 10-bit A/D converters designed for digitizing high 75dB SFDR up to 200MHz Input frequency, wide dynamic range signals. The LTC2232/ 775MHz Full Power Bandwidth S/H LTC2233 are perfect for demanding communications Single 3.3V Supply applications with AC performance that includes 61dB SNR Low Power Dissipation: 475mW/366mW and 75dB spurious free dynamic range for signals Selectable Input Ranges: 0.5V or 1V up to 200MHz. Ultralow jitter of 0.15ps allows RMS No Missing Codes undersampling of IF frequencies with excellent noise Optional Clock Duty Cycle Stabilizer performance. Shutdown and Nap Modes DC specs include 0.15LSB INL (typ), 0.1LSB DNL (typ) Data Ready Output Clock and 0.8LSB INL, 0.6LSB DNL over temperature. The Pin Compatible Family transition noise is a low 0.12LSB . RMS 135Msps: LTC2224 (12-Bit), LTC2234 (10-Bit) A separate output power supply allows the outputs to drive 105Msps: LTC2222 (12-Bit), LTC2232 (10-Bit) 0.5V to 3.6V logic. 80Msps: LTC2223 (12-Bit), LTC2233 (10-Bit) 48-Pin 7mm x 7mm QFN Package + The ENC and ENC inputs may be driven differentially or U single ended with a sine wave, PECL, LVDS, TTL, or CMOS APPLICATIO S inputs. An optional clock duty cycle stabilizer allows high Wireless and Wired Broadband Communication performance at full speed for a wide range of clock duty Cable Head-End Systems cycles. Power Amplifier Linearization , LTC and LT are registered trademarks of Linear Technology Corporation. Communications Test Equipment All other trademarks are the property of their respective owners. TYPICAL APPLICATIO 3.3V V SFDR vs Input Frequency DD 0.5V 90 TO 3.6V REFH FLEXIBLE 85 REFERENCE REFL 4th OR HIGHER OV DD 80 75 D9 + 10-BIT CORRECTION ANALOG OUTPUT INPUT 70 PIPELINED LOGIC INPUT DRIVERS S/H 2nd OR 3rd ADC CORE 65 D0 60 OGND 55 CLOCK/DUTY CYCLE 50 0 200 300 400 500 600 CONTROL 100 22323 TA01b INPUT FREQUENCY (MHz) 22323 TA01 ENCODE INPUT 22323fa 1 SFDR (dBFS) U ULTC2232/LTC2233 UUW ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO OV = V (Notes 1, 2) DD DD TOP VIEW Supply Voltage (V ) ................................................. 4V DD Digital Output Ground Voltage (OGND) ....... 0.3V to 1V Analog Input Voltage (Note 3) ..... 0.3V to (V + 0.3V) DD + A 1 36 D7 IN Digital Input Voltage .................... 0.3V to (V + 0.3V) A 2 35 D6 DD IN REFHA 3 34 D5 Digital Output Voltage ............... 0.3V to (OV + 0.3V) DD REFHA 4 33 OV DD REFLB 5 32 OGND Power Dissipation............................................ 1500mW REFLB 6 31 D4 49 REFHB 7 30 D3 Operating Temperature Range REFHB 8 29 D2 REFLA 9 28 OV DD LTC2232C, LTC2233C ............................. 0C to 70C REFLA 10 27 OGND V 11 26 D1 LTC2232I, LTC2233I ...........................40C to 85C DD V 12 25 D0 DD Storage Temperature Range ..................65C to 125C UK PACKAGE 48-LEAD (7mm 7mm) PLASTIC QFN EXPOSED PAD IS GND (PIN 49), MUST BE SOLDERED TO PCB T = 125C, = 29C/W JMAX JA ORDER PART UK PART NUMBER MARKING* LTC2232CUK LTC2232UK LTC2232IUK LTC2232UK LTC2233CUK LTC2233UK LTC2233IUK LTC2233UK Order Options Tape and Reel: Add TR Lead Free: Add PBF Lead Free Tape and Reel: Add TRPBF Lead Free Part Marking: