LTC2324-12 Quad, 12-Bit + Sign, 2Msps/Ch Simultaneous Sampling ADC Fea T Descrip T n 2Msps/Ch Throughput Rate The LTC 2324-12 is a low noise, high speed quad 12-bit n Four Simultaneously Sampling Channels + sign successive approximation register (SAR) ADC with n Guaranteed 12-Bit, No Missing Codes differential inputs and wide input common mode range. n 8V Differential Inputs with Wide Input Operating from a single 3.3V or 5V supply, the LTC2324- P-P Common Mode Range 12 has an 8V differential input range, making it ideal P-P n 78dB SNR (Typ) at f = 500kHz for applications which require a wide dynamic range with IN n 88dB THD (Typ) at f = 500kHz high common mode rejection. The LTC2324-12 achieves IN n Guaranteed Operation to 125C 0.5LSB INL typical, no missing codes at 12 bits and n Single 3.3V or 5V Supply 78dB SNR. n Low Drift (20ppm/C Max) 2.048V or 4.096V The LTC2324-12 has an onboard low drift (20ppm/C max) Internal Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2324-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 40mW/Ch (Typ) 2Msps per channel throughput with no latency makes the n Small 52-Lead (7mm 8mm) QFN Package LTC2324-12 ideally suited for a wide variety of high speed applications. The LTC2324-12 dissipates only 40mW per a T channel and offers nap and sleep modes to reduce the n High Speed Data Acquisition Systems power consumption to 26W for further power savings n Communications during inactive periods. n L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Optical Networking ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their n Multiphase Motor Control respective owners. Typical a T 32k Point FFT f = 2Msps, SMPL 10F 1F TRUE DIFFERENTIAL INPUTS f = 500kHz IN NO CONFIGURATION REQUIRED 3.3V OR 5V 1.8V TO 2.5V 0 + IN , IN SNR = 78.5dB V GND GND O THD = 87.8dB DD V DD ARBITRARY DIFFERENTIAL 20 SINAD = 78.2dB V V CMOS/LVDS DD DD + SFDR = 95.9dB A 12-BIT + SIGN IN1 S/H SDR/DDR A SAR ADC 40 IN1 REFBUFEN + SDO1 A 12-BIT + SIGN 60 IN2 S/H 0V 0V A SAR ADC SDO2 IN2 SDO3 80 LTC2324-12 SDO4 CLKOUT BIPOLAR UNIPOLAR + A 12-BIT + SIGN 100 IN3 SCK V V DD DD S/H A SAR ADC IN3 CNV SAMPLE 120 + A 12-BIT + SIGN CLOCK IN4 S/H A SAR ADC IN4 140 0V 0V 0 0.2 0.4 0.6 0.8 1 REF REFOUT1 REFOUT2 REFOUT3 REFOUT4 FREQUENCY (MHz) 232412 TA01b 1F 10F 10F 10F 10F FOUR SIMULTANEOUS SAMPLING CHANNELS 232412 TA01a 232412fa 1 For more information www.linear.com/LTC2324-12 AMPLITUDE (dBFS) ion pplica ions pplica ion uresLTC2324-12 a Te Maxi Mu M r a T p in c F T (Notes 1, 2) TOP VIEW Supply Voltage (V ) ..................................................6V DD Supply Voltage (OV ) ................................................3V DD Analog Input Voltage 52 51 50 49 48 47 46 45 44 43 42 41 + A , A (Note 3) ................... 0.3V to (V + 0.3V) A 1 40 DNC/SDOD IN IN DD IN4 + + A 2 39 SDO4/SDOD IN4 REFOUT1,2,3,4.......................0.3V to (V + 0.3V) DD GND 3 38 GND CNV........................................ 0.3V to (OV + 0.3V) DD A OV 4 37 IN3 DD Digital Input Voltage + A 5 36 DNC/SDOC IN3 + REFOUT3 6 35 SDO3/SDOC (Note 3) .......................... (GND 0.3V) to (OV + 0.3V) DD GND 7 34 CLKOUTEN/CLKOUT Digital Output Voltage 53 + REF 8 33 CLKOUT/CLKOUT GND (Note 3) .......................... (GND 0.3V) to (OV + 0.3V) DD REFOUT2 9 32 GND Operating Temperature Range A 10 31 OV IN2 DD + A 30 DNC/SDOB 11 IN2 LTC2324C ................................................ 0C to 70C + GND 12 29 SDO2/SDOB LTC2324I .............................................40C to 85C A 13 28 DNC/SDOA IN1 + + LTC2324H .......................................... 40C to 125C A 14 27 SDO1/SDOA IN1 15 16 17 18 19 20 21 22 23 24 25 26 Storage Temperature Range .................. 65C to 150C UKG PACKAGE 52-LEAD (7mm 8mm) PLASTIC QFN T = 150C, = 31C/W, = 2C/W JMAX JA JC EXPOSED PAD (PIN 53) IS GND, MUST BE SOLDERED TO PCB o r Der i n F Ma T