LTC2512-24 24-Bit Over-Sampling ADC with Configurable Flat Passband Digital Filter FEATURES DESCRIPTION n 1ppm INL (Typ) The LTC 2512-24 is a low noise, low power, high-perfor- n 117dB Dynamic Range (Typ) at 50ksps mance 24-bit ADC with an integrated configurable digital n 108dB Dynamic Range (Typ) at 400ksps filter. Operating from a single 2.5V supply, the LTC2512- n Guaranteed 24-Bits No Missing Codes 24 features a fully differential input range up to V , REF n Configurable Digital Filter with Synchronization with V ranging from 2.5V to 5.1V. The LTC2512-24 REF n Relaxed Anti-Aliasing Filter Requirements supports a wide common mode range from 0V to V REF n Dual Output 24-Bit SAR ADC simplifying analog signal conditioning requirements. n 24-Bit Digitally Filtered Low Noise Output The LTC2512-24 simultaneously provides two output n 14-Bit Differential + 8-Bit Common Mode codes: (1) a 24-bit digitally filtered high precision low No Latency Output noise code, and (2) a 22-bit no latency composite code. n Wide Input Common-Mode Range The configurable digital filter reduces measurement noise n Guaranteed Operation to 85C by lowpass filtering and down-sampling the stream of n 1.8V to 5V SPI-Compatible Serial I/O data from the SAR ADC core, giving the 24-bit filtered n Low Power: 30mW at 1.6Msps output code. The 22-bit composite code consists of a n 24-Lead 7mm 4mm DFN Package 14-bit code representing the differential voltage and an 8-bit code representing the common mode voltage. The APPLICATIONS 22-bit composite code is available each conversion cycle, n Seismology with no cycle of latency. n Energy Exploration The digital filter can be easily configured for 4 different n Automated Test Equipment (ATE) down-sampling factors by pin strapping. The configura- n High-Accuracy Instrumentation tions provide a dynamic range of 108dB at 400ksps and All registered trademarks and trademarks are the property of their respective owners. Protected 117dB at 50ksps. The digital lowpass filter relaxes the by U.S. Patents, including 7705765, 7961132, 8319673, 8576104, 8810443, 9054727, 9231611, 9331709 and Patents pending. requirements for analog anti-aliasing. Multiple LTC2512- 24 devices can be easily synchronized using the SYNC pin. TYPICAL APPLICATION Integral Nonlinearity 2.5V 1.8V TO 5V vs Input Voltage 3 10F 0.1F + IN , IN 2 V LTC2512-24 OV MCLK SAMPLE DD DD ARBITRARY DIFFERENTIAL V V REF REF CLOCK BUSY + PIN SELECTABLE 1 IN DRL LOW-PASS SDOA 24-BIT 0V 0V FLAT PASSBAND SAR ADC SCKA 0 24-BIT DIGITAL FILTER BIPOLAR UNIPOLAR V V CORE REF REF RDLA RDLB IN 1 14-BIT SDOB 0V 0V REF GND SCKB 2 + DIFFERENTIAL INPUTS IN /IN WITH 251224 TA01 2.5V TO 5.1V WIDE INPUT COMMON MODE RANGE 47F 3 (X7R, 1210 SIZE) 5 2.5 0 2.5 5 INPUT VOTLAGE (V) 251224f TA01a 251224fa 1 For more information www.linear.com/LTC2512-24 INL ERROR (ppm)LTC2512-24 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) TOP VIEW Supply Voltage (V ) ...............................................2.8V DD Supply Voltage (OV ) ................................................6V DD RDLA 1 24 GND RDLB 2 23 GND Reference Input (REF) .................................................6V V 3 22 OV DD DD Analog Input Voltage (Note 3) GND 4 21 BUSY + + IN 5 20 SDOB IN , IN .........................(GND 0.3V) to (REF + 0.3V) IN 6 19 SCKB 25 Digital Input Voltage GND 7 18 SCKA GND REF 8 17 SDOA (Note 3) .......................... (GND 0.3V) to (OV + 0.3V) DD REF 9 16 GND Digital Output Voltage REF 10 15 DRL SEL0 11 14 SYNC (Note 3) .......................... (GND 0.3V) to (OV + 0.3V) DD SEL1 12 13 MCLK Power Dissipation .............................................. 500mW Operating Temperature Range DKD PACKAGE 24-LEAD (7mm 4mm) PLASTIC DFN LTC2512C-24 ........................................... 0C to 70C T = 125C, = 40C/W JMAX JA LTC2512I-24 .........................................40C to 85C EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB Storage Temperature Range .................. 65C to 150C