LTC6951 Ultralow Jitter Multioutput Clock Synthesizer with Integrated VCO Fea T Descrip T n Low Noise Integer-N PLL with Integrated VCO The LTC 6951 is a high performance, low noise, Phase n Output Jitter: Locked Loop (PLL) with a fully integrated VCO. The low n 90fs RMS (12kHz to 20MHz) noise VCO uses no external components and is internally n 115fs RMS (ADC SNR Method) calibrated to the correct output frequency with no external n Noise Floor = 165dBc/Hz at 250MHz system support. n EZSync, ParallelSync Multichip Synchronization The clock generation section provides five outputs based n SYSREF Generation for JESD204B, Subclass 1 on the VCO prescaler signal with individual dividers for n Output Frequency Range: each output. Four outputs feature very low noise, low skew n 1.95MHz to 2.5GHz (LTC6951) CML logic. The fifth output is low noise LVDS. All outputs n 2.1MHz to 2.7GHz (LTC6951-1) can be synchronized and set to precise phase alignment n 229dBc/Hz Normalized In-Band Phase Noise Floor using the programmable delays. n 277dBc/Hz Normalized In-Band 1/f Noise n Five Independent, Low Noise Outputs Choose the LTC6951-1 if any desired output frequency n Reference Input Frequency up to 425MHz falls in the ranges 2.5GHz to 2.7GHz, 1.66GHz to 1.8GHz, n LTC6951Wizard Software Design Tool Support or 1.25GHz to 1.35GHz. Choose the LTC6951 for all other n 40C to 105C Operating Junction Temperature Range frequencies. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and EZSync, LTC6951Wizard and ParallelSync are trademarks of Linear Technology Corporation. a T All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 8319551 and 8819472. n High Performance Data Converter Clocking n Wireless Infrastructure n Test and Measurement Typical a T 3.3V 5V 10 1F 1F 0.01F 0.01F 0.01F 1F SNR vs Input Frequency of 100MHz LTC6951 Clocking an LTC2107, 1F 1F REF OSC + + + + V V V CP VCO REF f = 210Msps, A = 3dBFS 63.4 CP S IN PHASE R DIVIDER REF CHARGE 82 50 63.4 FREQUENCY PUMP 1F DETECTOR 80 820pF 1.2nF 68nF LTC6951 N DIVIDER 78 TUNE CMA 76 0.1F CMB + P DIVIDER OUT0 74 CMC D0 M0 TB OUT0 100 TO LTC2107 72 DELAY DIV BB 1F + 70 BVCO OUT1 470nF 1F D1 M1 0.1F 68 OUT1 DELAY DIV 66 SYNC + NOTE 12 SYNC OUT2 CONTROL 64 LTC2107 APERTURE JITTER = 45f RMS S D2 M2 TO ADC LTC6951 JITTER =115f RMS S OUT2 DELAY DIV OR DAC 62 STAT 0 100 200 300 400 500 600 700 800 + OUT3 CS TO/FROM INPUT FREQUENCY (MHz) D3 M3 6951 TAO1b PROCESSOR SCLK SERIAL OUT3 DELAY DIV PORT SDI + OUT4 SDO D4 M4 TO FPGA OUT4 DELAY DIV GND 6951 TAO1a 6951fa 1 For more information www.linear.com/LTC6951 SNR (dBFS) ion pplica ions pplica ion uresLTC6951 a Te Maxi Mu M r a T p in c F T (Note 1) TOP VIEW Supply Voltages + + + + + V (V , V , V , V ) to GND ........................3.6V REF RF D OUT + + 40 39 38 37 36 35 34 33 V , V to GND .................................................5.5V CP VCO + + V 1 32 GND OUT Voltage on CP Pin .................GND 0.3V to V + 0.3V CP + + OUT2 2 31 V VCO Voltage on all other Pins ...........GND 0.3V to V + 0.3V + OUT2 3 30 BVCO + Current into OUTx , OUTx , (x = 0, 1, 2, 3, 4) .......25mA + V GND 4 29 OUT Operating Junction Temperature Range, T (Note 2) J OUT1 CM 5 28 A LTC6951I and LTC6951I-1 ......................40 to 105C + OUT1 6 27 CM 41 B + GND Junction Temperature, T ................................ 125C V 7 26 CM JMAX OUT C OUT0 8 25 GND Storage Temperature Range ......................65 to 150C + OUT0 9 24 TB + V 23 TUNE 10 OUT OUT3 11 22 BB + + OUT3 12 21 V RF 13 14 15 16 17 18 19 20 UHF PACKAGE 40-LEAD (5mm 7mm) PLASTIC QFN T = 125C, = 2C/W, = 19C/W JMAX JCbottom JCtop EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB o r Der i n F Ma T (