LTC6955 Ultralow Jitter, 7.5GHz, 11 Output Fanout Buffer Family FEATURES DESCRIPTION n LTC6955: 11 Output Buffer The LTC 6955 is a high performance, ultralow jitter, n LTC6955-1: 10 Buffered Outputs and One 2 Output fanout clock buffer with eleven outputs. Its 4-pin parallel n Additive Output Jitter ~45fs RMS (ADC SNR Method) control port allows for multiple output setups, enabling n Additive Output Jitter < 5fs RMS any number between three and eleven outputs, as well as (Integration BW = 12kHz to 20MHz, f = 7.5GHz) a complete shutdown. The parallel port also provides the n Eleven Ultralow Noise CML Outputs ability to invert the output polarity of alternating outputs, n Parallel Control for Multiple Output Configurations simplifying designs with top and bottom board routing. n 40C to 125C Operating Junction Temperature Each of the CML outputs can run from DC to 7.5GHz. Range The LTC6955-1 replaces one output buffer with a divide- by-2 frequency divider, allowing it to drive Analog Devices LTC6952 or LTC6953 to generate JESD204B subclass 1 APPLICATIONS SYSREF signals. These SYSREFs can pair with ultralow n High Performance Data Converter Clocking jitter device clocks from the LTC6955-1, which can run n SONET, Fibre Channel, GigE Clock Distribution at frequencies up to 7.5GHz. n Low Skew and Jitter Clock and Data Fanout All registered trademarks and trademarks are the property of their respective owners. Protected n Wireless and Wired Communications by U.S. patents, including 8319551 and 8819472. n Single-Ended to Differential Conversion TYPICAL APPLICATION 7GHz Cumulative Phase Noise Generation of Multiple Low Jitter 7GHz Clocks ADF4371 Driving LTC6955 FILT OUT0 80 ADF4371 OUT1 SEL3 90 ADF4371 + LTC6955 OUT2 SEL2 100 OUT3 POWERED DOWN OR SEL1 10k OUT4 ADDITIONAL CLOCKS 110 3.3V SEL0 OUT5 LTC6955 120 OUT7 + 3.3V V D BUFFER OUT9 130 + V OUT 0.1F 140 + 3.3V OUT6 150 /1 100 TOTAL COMBINED 0.1F RMS JITTER = 67fs OUT6 160 ADF4371 RMS JITTER = 50fs LTC6955 RMS JITTER = 45fs 170 7.4nH 7.4nH + 3.3V Crystek V 0.1F IN EQUIVALENT ADC SNR METHOD + CCHD-575-25-100 OUT8 180 ADF4371 7.00GHz 100MHz Ref Osc 1k 10k 100k 1M 10M 40M 1nF 10pF 1pF 100 /1 0.1F CLOCKS OUT8 OFFSET FREQUENCY (Hz) + REFP RF8N IN 6955 TA01b REFN 0.1F 1nH 10pF 1pF + OUT10 .01F 100 RF8P IN /1 0.1F OUT10 6955 TA01a Rev. 0 1 Document Feedback For more information www.analog.com PHASE NOISE (dBc/Hz)LTC6955 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW Supply Voltages + + + + V (V , V , V ) to GND ...............................3.6V IN D OUT + Voltage on All Pins ....................GND 0.3V to V + 0.3V 52 51 50 49 48 47 46 45 44 43 42 41 + Current into OUTx , OUTx , (x = 0 to 10) ............25mA SEL3 1 40 FILT + + Operating Junction Temperature Range, T (Note 2) J V 2 39 V D IN LTC6955I and LTC6955I-1 ................. 40C to 125C OUT10 3 38 IN + + OUT10 4 37 IN Junction Temperature, T ................................ 130C JMAX + V 5 36 NC OUT Storage Temperature Range .................. 65C to 150C + OUT9 6 35 V OUT + + OUT9 7 34 OUT0 53 + (GND) V 8 33 OUT0 OUT + OUT8 9 32 V OUT + + OUT8 10 31 OUT1 + V 11 30 OUT1 OUT + OUT7 12 29 V OUT + + OUT7 13 28 OUT2 + V 14 27 OUT2 OUT 15 16 17 18 19 20 21 22 23 24 25 26 UKG PACKAGE 52-LEAD (7mm 8mm) PLASTIC QFN T = 130C, = 2C/W, = 31C/W JMAX JC JA EXPOSED PAD (PIN 53) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC6955IUKG PBF LTC6955IUKG TRPBF LTC6955UKG 52-Lead (7mm 8mm) Plastic QFN 40C to 125C LTC6955IUKG-1 PBF LTC6955IUKG-1 TRPBF LTC6955UKG-1 52-Lead (7mm 8mm) Plastic QFN 40C to 125C Contact the factory for parts specified with wider operating temperature ranges. Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with TRMPBF suffix. Rev. 0 2 For more information www.analog.com OUT6 SEL2 + OUT6 SEL1 + V SEL0 OUT OUT5 TEMP + OUT5 NC + V NC OUT OUT4 NC + OUT4 NC + V NC OUT OUT3 NC + OUT3 NC + V GND OUT