EVALUATION KIT AVAILABLE MAX11253 16-Bit, 6-Channel, 64ksps, 6.2nV/Hz PGA, Delta-Sigma ADC with SPI Interface General Description Benefits and Features The MAX11253 is a 6-channel, 16-bit delta-sigma ADC High Resolution for Industrial Applications that that achieves exceptional performance while consuming Require a Wide Dynamic Range very low power. Sample rates up to 64ksps allow preci- 98dB SNR at 1000sps sion DC measurements. The MAX11253 communicates Longer Battery Life for Portable Applications via a SPI serial interface and is available in a small (5mm 2.2mA Operating Mode Current x 5mm) TQFN package. 1A Sleep Current The MAX11253 offers a 6.2nV/Hz noise programmable Single or Split Analog Supplies Provide Input Voltage gain amplifier (PGA) with gain settings from 1x to 128x. Range Flexibility The integrated PGA provides isolation of the signal inputs 2.7V to 3.6V (Single Supply) or 1.8V (Split Supply) from the switched capacitor sampling network. The PGA Enables System Integration also enables the MAX11253 to interface directly with Low Noise, 6.2nV/ Hz PGA with Gains of 1, 2, 4, high-impedance sources without compromising available 8, 16, 32, 64, 128 dynamic range. 6-Channel, Fully Differential Input The MAX11253 operates from a single 2.7V to 3.6V analog supply, or split 1.8V analog supplies, allowing Enables On-Demand Device and System Gain and Offset Calibration the analog input to be sampled below ground. The digital supply range is 1.7V to 2.0V or 2.0V to 3.6V, allowing User-Programmable Offset and Gain Registers communication with 1.8V, 2.5V, 3V, or 3.3V logic. Robust Performance in a Small Package -40 C to +125C Operating Temperature Range Applications TQFN Package, 5mm x 5mm Analog I/O for Programmable Logic Controllers Weigh Scales Pressure Sensors Ordering Information appears at end of data sheet. Battery-Powered Instrumentation Typical Application Circuit 2.7V TO 3.6V REF 10nF 2.0V TO 3.6V 1F 1F REFN REFP AVDD DVDD AIN0P 1nF RSTB C0G CSB AIN0N SCLK C MAX11253 DIN DOUT AIN5P RDYB 1nF C0G AIN5N GPO0 GPO1 GPOGND CAPP CAPN CAPREG AVSS DGND 220nF 0603 X7R 1nF C0G RESISTIVE BRIDGE MEASUREMENT CIRCUIT, SPI CONFIGURATION 19-7650 Rev 0 6/15MAX11253 16-Bit, 6-Channel, 64ksps, 6.2nV/Hz PGA, Delta-Sigma ADC with SPI Interface Absolute Maximum Ratings AVDD to AVSS .....................................................-0.3V to +3.9V CAPREG to DGND ...............................................-0.3V to +2.1V AVDD to DGND ....................................................-0.3V to +3.9V All Other Pins to DGND.............................. -0.3V to the lower of DVDD to DGND ....................................................-0.3V to +3.9V +3.9V or (V + 0.3V) DVDD AVSS to DGND ..................................................-1.95V to +0.3V Maximum Continuous Current into Any Pins DVDD to AVSS .....................................................-0.3V to +3.9V Except GPOGND Pin ...................................................50mA AVSS to GPOGND .............................................-1.95V to +0.3V Maximum Continuous Current into GPOGND to DGND ............................................-1.95V to +0.3V GPOGND Pin .............................................................100mA AIN P, AIN N, REFP, REFN, Continuous Power Dissipation (T = +70C) A CAPP, CAPN to AVSS ............................ -0.3V to the lower of TQFN (derate 34.5mW/C above +70C) ...............2758.6mW +3.9V or (V + 0.3V) Operating Temperature Range ......................... -40C to +125C AVDD GPO to GPOGND .................................... -0.3V to the lower of Junction Temperature ......................................................+150C +3.9V or (V + 0.3V) Storage Temperature Range ............................ -55C to +150C AVDD CAPREG to AVSS ................................................-0.3V to +3.9V Soldering Temperature (reflow) .......................................+260C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (Note 1) Package Thermal Characteristics TQFN Junction-to-Ambient Thermal Resistance ( ).29C/W JA Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (V = 3.6V, V = 0V, V = 2.0V to 3.6V, V - V = V , DATA RATE = 1ksps, PGA low-noise mode, single-cycle AVDD AVSS DVDD REFP REFN AVDD conversion mode (SCYCLE = 1). T = T to T , unless otherwise noted. Typical values are at T = +25C.)(Note 2) A MIN MAX A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE (Single-Cycle Conversion Mode) PGA low- PGA gain of 0.31 noise mode 128, single-cycle mode at 1ksps PGA low- 0.36 data rate power mode PGA low- PGA gain of 128, 0.87 noise mode Noise Voltage single-cycle V V n RMS (Referred to Input) mode at 12.8ksps PGA low- 1.19 data rate power mode PGA low- PGA gain of 128, 0.87 noise mode continuous mode at 64ksps PGA low- 1.19 data rate power mode Integral Nonlinearity INL 3 15 ppm After system zero-scale Zero Error Z 1 V ERR calibration Zero Drift Z 50 nV/C Drift After system full-scale Full-Scale Error FSE 2 ppmFSR calibration (Notes 3 and 4) Maxim Integrated 2 www.maximintegrated.com