MAX3634 19-3818 Rev 0 9/05 622Mbps/1244Mbps Burst-Mode Clock Phase Aligner for GPON OLT Applications General Description Features The MAX3634 burst-mode clock phase aligner (CPA) is DC-Coupled Clock Phase Aligner for Burst-Mode designed specifically for 622Mbps or 1244Mbps GPON GPON Applications (ITU G.984) optical line terminal (OLT) receiver applica- tions. The MAX3634 provides clock and clock-aligned 13-Bit Burst Acquisition Time resynchronized upstream data through differential LVPECL outputs. Using the OLT system clock as a ref- 0.85UI High-Frequency Jitter Tolerance erence, the MAX3634 aligns to the input data and Continuous Clock Output acquires within the first 13 bits of the burst. The CPA operates with received data that is frequency locked to Byte Rate (1/8th Data Rate) Reference Clock Input the OLT reference. The acquisition time, bit-error ratio, and jitter tolerance all support GPON PMD specifica- Lock Detect Output tions. LVPECL high-speed clock and data outputs pro- LVPECL Serial Data Input and Output vide compatibility with FPGAs at 622Mbps and with the MAX3885 deserializer at 1244Mbps. LVPECL Reset Input The MAX3634 is available in a low-profile, 7mm x 7mm, 48-lead TQFN package. The MAX3634 operates from a single +3.3V supply, over the -40C to +85C tempera- Ordering Information ture range. PIN- PKG PART TEMP RANGE PACKAGE CODE Applications 48 TQFN MAX3634ETM -40C to +85C T4877-6 (7mm x 7mm) 622Mbps GPON OLT Receivers 1244Mbps GPON OLT Receivers Pin Configuration appears at end of data sheet. Typical Application Circuit BURST RESET BURST ENABLE DATA 4 DATA MAX3634 MAX3656 MAX3892 CLOCK BURST-MODE UPSTREAM BURST-MODE TIA/LA 1244Mbps BURST-MODE DATA CLOCK PHASE CLOCK LASER DRIVER SERIALIZER ALIGNER DIVIDE BY 16 DIVIDE BY 8 RATESEL MAX3872 MAX3864 MAX3738 OLT CLOCK CLOCK MAX3748A CONTINUOUS DOWNSTREAM SONET TIA/LA LASER DRIVER 2488Mbps CDR DATA DATA GPON OPTICAL LINE TERMINATION GPON OPTICAL NETWORK TERMINATION Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLE622Mbps/1244Mbps Burst-Mode Clock Phase Aligner for GPON OLT Applications ABSOLUTE MAXIMUM RATINGS V , V I, V O, V V........................................-0.5V to +4.0V Continuous Power Dissipation (T = +85C) CC CC CC CC A SDI, RST, REFCLK, 48-Lead TQFN package RATESEL, FILT, TEST.............................-0.5V to (V + 0.5V) (derate 27.8mW/C above +85C).............................1800mW CC LVPECL Output Current (SDO, SCLK, LOCK).............50mA Storage Temperature Range .............................-55C to +150C Operating Ambient Temperature Range .............-40C to +85C Lead Temperature (soldering, 10s) .................................+400C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, T = -40C to +85C. Typical values are at V = +3.3V, T = +25C, unless otherwise noted.) CC A CC A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Current I Not including LVPECL output current 315 390 mA CC RATESEL = low 1244.16 Data Rate Mbps RATESEL = high 622.08 RATESEL = low 155.52 Reference Clock Input Frequency MHz RATESEL = high 77.76 SDI, RST, REFCLK Differential V 200 1600 mV IN P-P Input SDI, RST, REFCLK Input -180 +180 A Current Rate = 1244Mbps 200 RST Input Rise/Fall Times t , t ps r f Rate = 622Mbps 200 SDI, RST, REFCLK Common- V V CC CC V Mode Input - 1.49 - V /4 IN V V CC CC T = 0C to +85C (Note 1) A - 1.81 - 1.62 SDO, SCLK, LOCK Output V V OL Voltage Low V V CC CC T = -40C to 0C (Note 1) A - 1.83 - 1.555 V V CC CC T = 0C to +85C (Note 1) A - 1.025 - 0.88 SDO, SCLK, LOCK Output V V OH Voltage High V V CC CC T = -40C to 0C (Note 1) A - 1.085 - 0.88 622Mbps (Notes 2, 5, 6) 0.73 0.83 Jitter Tolerance UI P-P 1244Mbps (Notes 2, 5, 6) 0.73 0.81 Acquisition Time (Notes 2, 3) 13 Bits -10 Bit-Error Ratio After acquisition (Notes 2, 4) 10 SDO, LOCK Transition Time t , t 20% to 80% (Note 1) 265 ps r f SCLK Transition Time t , t 20% to 80% (Note 1) 200 ps r f 2 MAX3634