MAX3815 19-3466 Rev 2 2/08 TMDS Digital Video Equalizer for DVI/HDMI Cables General Description Features The MAX3815 cable equalizer automatically provides Extends TMDS Cable Reach to Projectors or compensation for DVI, HDMI, DFP, PanelLink , and Monitors Using DVI, DFP, PanelLink, ADC, or ADC cables. It extends the usable cable distance up to HDMI Interfaces 36 meters. The MAX3815 is designed to equalize sig- Extends TMDS Interface Length as Follows: nals encoded in the transition-minimized differential 0 to 50 Meters Over DVI-Cable, 24 AWG STP signaling (TMDS ) format. (Shielded-Twisted Pair) The MAX3815 features four CML-differential inputs and 0 to 36 Meters Over DVI-Cable, 28 AWG STP outputs (three data and one clock). It provides a loss- 0 to 30 Meters Over DVI-Cable, 30 AWG STP of-signal (LOS) output that indicates loss-of-clock sig- Compatible with DTV Resolutions 480i, 480p, nal. The outputs include a disable function or the 720p, 1080i, and 1080p equalizer can be powered down to conserve power. Compatible with Computer Resolutions VGA, For direct chip-to-chip communication, the output dri- SVGA, XGA, SXGA, UXGA vers can be switched to one-half the DVI output specifi- cation to conserve power and reduce EMI. Equalization Fully Automatic Equalization Up to 40dB at can be automatic or set to manual control for specific 825MHz (1.65Gbps), No System Control Required in-cable applications. 3.3V Power Supply The MAX3815 is available in a 7mm x 7mm, 48-pin Power Dissipation of 0.6W (typ) TQFP-EP package and operates over a 0C to +70C 7mm x 7mm 48-Pin TQFP Lead-Free Package temperature range. Applications Ordering Information Front-Projector DVI/HDMI Inputs TEMP PIN- PKG PART RANGE PACKAGE CODE High-Definition Televisions and Displays MAX3815CCM 0C to +70C 48 TQFP-EP* C48E-8 DVI-D/HDMI Cable-Extender Modules and Active MAX3815CCM+ 0C to +70C 48 TQFP-EP* C48E-8 Cable Assemblies +Denotes lead-free package. LCD Computer Monitors *EP = Exposed pad. Pin Configuration appears at end of data sheet. Typical Application Circuits VIDEO PROJECTOR RGB/HV VGA INPUT LCD, PANEL ADC/SYNC LAPTOP IMAGE DLP, INTERFACE SCALER AND OR TIMING AND PROCESSOR DVI-D INPUT LCOS DRIVERS TMDS MAX3815 DESERIALIZER EQUALIZER DVI-D CABLE UP TO 36m OR 120ft (28AWG STP) Typical Application Circuits continued at end of data sheet. DVI is a trademark of Digital Display Working Group. HDMI is a trademark of HDMI Licensing, LLC. PanelLink and TMDS are registered trademarks of Silicon Image, Inc. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLE SELECTTMDS Digital Video Equalizer for DVI/HDMI Cables ABSOLUTE MAXIMUM RATINGS Supply Voltage V ..............................................-0.5V to +4.0V Operating Junction Temperature Range...........-55C to +150C CC Voltage at All I/O Pins.................................-0.5V to (V + 0.7V) Storage Temperature Range .............................-55C to +150C CC Voltage between any CML I/O Complementary Pair..........3.3V Die Attach Temperature...................................................+400C Continuous Power Dissipation (T = +70C) A 48-Pin TQFP-EP (derate 36.2mW/C above +70C) ..2896mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, T = 0C to +70C. Typical Values are at V = +3.3V, external terminations = 50 1%, TMDS rate = CC A CC 250Mbps to 1.65Gbps, T = +25C, unless otherwise noted.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PWRDWN = HIGH 165 230 Power-Supply Current I mA CC PWRDWN = LOW 10 Supply-Noise Tolerance DC to 500kHz 200 mV P-P EQUALIZER PERFORMANCE 1dB skin-effect loss at 825MHz 0.2 Residual Output Jitter (Cables Only) 0.25Gbps to 1.65Gbps 24dB skin-effect loss at 825MHz 0.2 UI (Notes 1, 2, and 3) 40dB skin-effect loss at 825MHz 0.2 CID Tolerance 20 Bits CONTROL AND STATUS Differential peak-to-peak at EQ input with CLKLOS Assert Level 50 mV P-P 165MHz clock CML INPUTS (CABLE SIDE) Differential Input Voltage Swing V At cable input 800 1000 1400 mV ID P-P V - V + CC CC Common-Mode Input Voltage V V CM 0.4 0.1 Input Resistance R Single-ended 45 50 55 IN CML OUTPUTS (ASIC SIDE) OUTLEVEL = HIGH 800 1000 1200 50 load, each side Differential Output-Voltage Swing V mV OD P-P to V CC OUTLEVEL = LOW 350 500 650 Output-Voltage High Single-ended, OUTLEVEL = HIGH V mV CC V - V - CC CC Output-Voltage Low Single-ended, OUTLEVEL = HIGH mV 600 400 Output Voltage During V - V CC CC Single-ended, PWRDWN = LOW mV Power-Down 10 +10 2 MAX3815