VisualDSP++ Development and Debugging Environment Features Integrated Development and Debugging Environment Multiple project management Profiling and tracing of instruction execution Automation API and automation aware scripting engine Multiple processor (MP) support Background telemetry channel (BTC) support with data streaming capability Statistical profiling Gra phical plotting capabilities Cache visualization Execution pipeline viewer Compiled simulation Efficient Application Code Generation Na tive C/C++ compiler and enhanced Overview assembler VisualDSP++ 5.0 is a state-of-the-art software development environment targeting the Profile-guided optimization (PGO) Analog Devices embedded processor portfolio. With the embedded software engineer and Expert linker with profiling capability signal processing-intensive applications specifically in mind, VisualDSP++, coupled with Integrated source code control Analog Devices in-circuit emulator (ICE) and EZ-KIT Lite evaluation products, provides best- TCP/IP and USB support for Blackfin in-class capabilities for developing demanding real-time applications. Processors Platforms and Processor Support Processor configuration/start-up code VisualDSP++ supports Analog Devices Blackfin Processors, SHARC Processors, and wizard for Blackfin Processors TigerSHARC Processors. Windows XP, Windows 2000, and Windows Vista VisualDSP++ kernel (VDK) with are supported. multiprocessor messaging capability Develop High Performance Applications Quickly System services and device driver support for Blackfin Processors At the heart of VisualDSP++ is a robust and powerful C/C++ compiler. The compiler consistently delivers industry-leading performance on standard benchmarks, ensuring F ile system support for Blackfin that all but the most performance-demanding applications can be written entirely in the Processors C language, accelerating development time while maintaining a portable code base. The compiler is backed by a rich library of signal-processing routines, allowing easy access to hand-coded, optimized implementations of FFTs, FIRs, etc. The Blackfin and SHARC compilers support MISRA-C:2004 for safety-critical embedded systems (www.misra-c.com). The ANSI-C compiler is also augmented with popular language extensions and enhancements to make it more amiable to existing code bases. Examples include GNU GCC extensions, ETSI fractional libraries, and multiple heap support. www.analog.com/processors/toolsA compilers overriding mission is to produce correct code, so there Built upon the system service library, the file system service (FSS) are occasions when the compiler must take a conservative approach provides a portable and extensible means of accessing mass to a code sequence when a more aggressive approach could have storage media from the Blackfin Processor. Support for the been taken if certain constraints could be guaranteed by the ADSP-BF548 EZ-KIT Lite development board is provided with programmer. The VisualDSP++ compiler supports a broad range of VisualDSP++ 5.0 for FAT file systems on the attached hard disk pragma that allow the programmer to better exploit the compiler drive, supplied SD card, and USB flash. while maintaining C language neutrality. Just as important, the As embedded applications become increasingly part of the connected compiler has the ability to feed back advisory information to the world, the ability to rapidly add reliable Ethernet or USB connectivity programmer, offering further improvements to a code sequence should to an application can often make or break a development schedule. the programmer be able to make certain guarantees about it. This For Blackfin Processors, VisualDSP++ includes a tuned port of the information is displayed seamlessly in the VisualDSP++ main editor open source LwIP TCP/IP stack. An example application showcasing window. This lifts the veil off the black box that compilers are often, an embedded Web server is among the highlights of this support. For and accurately, accused of being. Blackfin Processors and SHARC Processors, USB 2.0 device connectivity Backing the compiler is a powerful assembler and linker technology. is provided. Bulk and asynchronous transfer modes are supported out Analog Devices processors are noted for their intuitive algebraic of the box, with USB-IF logo certified embedded and host applications assembly language syntax, and the VisualDSP++ assembler extends that provided with full source code. ease of use with the ability to import C header files, allowing for symbolic references into arbitrarily complex C data structures. Binary data can be included directly into assembly source files, creating an easy way to add blocks of static data (such as audio samples and bitmaps) to an application. The VisualDSP++ linker is fully multicore and multiprocessor (MP) aware, allowing for the creation of cross-linked, multiexecutable applications in a single pass. Other powerful capabilities of the linker include dead code and data elimination, code and data overlays, section spilling (i.e., automatic overflow from internal to external memory), and automatic short-to-long call expansion. Leverage Proven Application Infrastructure VisualDSP++ goes beyond robust code generation tools, providing considerable application infrastructure and middleware out of the box to speed application development. The VisualDSP++ kernel (VDK) is a robust, royalty-free, real-time operating system (RTOS) kernel. It provides essential kernel features in a minimal footprint. Features include a fully preemptive scheduler (time slicing and cooperative scheduling are also Source code generation. supported), thread creation, semaphores, interrupt management, inter- thread messaging, events, and memory management (memory pools Wrapping all of these powerful tools and libraries together is the and multiple heaps). In MP environments, MP messaging is also VisualDSP++ state-of-the-art integrated development and debugging provided. Configuration of these elements is done graphically with code environment (IDDE). The IDDE includes full-featured editing and project wizards to speed the creation of new threads and interrupt handlers. manage-ment tools with incremental builds, multiple build configurations VDK has been available for multiple releases of VisualDSP++ and is now (Debug and Release, for example), syntax-coloring editor, and many a key component of products shipping from a number of high volume other code editing features. Makefiles can be imported and exported vendors. Several commercial RTOSs are also available from select Analog freely. For Blackfin Processors, many application attributes can be Devices third parties. configured graphically, enabling point-and-click access to SDRAM setup, stack and heap placement, power management, clock speed, cache Blackfin Processors can take advantage of the system service library setup, and more. (SSL), which provides consistent, easy C language access to Blackfin features such as the interrupt manager, direct memory access (DMA), Debug and Tune Your Application with Ease and power management units. Clock frequency and voltage can be The ability to develop a high performance application is often gated changed easily at run time through a set of simple APIs. Interrupt by the visibility into your running system that your debugger provides. handling can be live, fired at the time of the event, or deferred to a later VisualDSP++ excels in this regard, with best-in-class debugging and time of the applications choosing. A device manager integrates device inspection support. Robust fundamental C language source debugging drivers for on- and off-chip peripherals. VisualDSP++ includes ever (source-level stepping and breakpoints, stack unwinds, local variable expanding device driver support for all on-chip peripherals and off-chip and C expression support, memory and register windows) serves as a devices found on Analog Devices EZ-KIT Lite and EZ-Extender products. foundation upon which multiple innovative and unique tools rest. The SSL is OS-neutral and can be run as a standalone or in conjunction with an RTOS. VisualDSP++ supports a variety of debugging targets. Most common is a JTAG connection to an EZ-KIT Lite board or to a custom target board by means of Analog Devices emulator products. However, there will be