ABCU-5710RZ / ABCU-5700RZ 1000BASE-T 1.25 GBd Small Form Pluggable Low Voltage (3.3 V) Electrical Transceiver over Category 5 Cable Data Sheet Description Features RoHS-6 Compliant The ABCU-5710RZ and ABCU-5700RZ electrical Designed for Industry-Standard, MSA Compliant transceivers from Avago Technologies offer full- Small Form Factor Pluggable (SFP) Ports duplex throughput of 1000 Mbps by transporting data over shielded and unshielded twisted pair Compatible with IEEE 802.3:2000 category 5 cable with 5-level PAM (Pulse Amplitude Custom RJ-45 connector with integrated Modulation) signals. The ABCU-5710RZ and ABCU- magnetics 5700RZ differ only in handling of RX LOS signal Link lengths at 1.25 Gbd: up to 100 m per functions, as explained further on the following IEEE802.3 pages. Low power, high performance 1.25 Gbd SerDes integrated in module The Avago Technologies 1000BASE-T module takes Single +3.3 V power supply operation signals from both the twisted pair category 5 cable Auto-negotiation per IEEE 802.3:2000 Clause 28 and the SerDes interface. Pin count overhead (Twisted Pair) and Clause 37 (1000BASE-X) between the MAC and the PHY is minimized, and Gigabit Ethernet operation is achieved with Compatible to both shielded and unshielded maximum space savings. twisted pair category 5 cable Two configurations: Module Diagrams ABCU-5700RZ: RX LOS enabled Figure 1 illustrates the major functional components ABCU-5710RZ: RX LOS disabled of the ABCU-5700/5710RZ. The 20-pin connection Rated for Commercial Temperature applications diagram of module printed circuit board of the (0 - 70 C) module is shown in Figure 2. Figure 3 depicts the pin assignment of the MDI (RJ45 jack). Applications Figure 6 depicts the external configuration and Switch to switch interface dimensions of the module. Switched backplane applications File server interface Related Products AFBR-5710Z: Family of 850nm +3.3V SFP optical transceivers for Gigabit Ethernet AFCT-5710Z: Family of 1310nm +3.3V SFP optical transceivers for Gigabit EthernetInstallation Serial Identification (EEPROM) The ABCU-5700/5710RZ can be installed in or removed The ABCU-5700/5710RZ complies with an industry from any MultiSource Agreement (MSA) compliant Small standard MultiSource Agreement that defines the serial Form Pluggable port whether the host equipment is identification protocol. This protocol uses the 2-wire operating or not. The module is simply inserted, small serial CMOS EEPROM protocol of the ATMEL AT24C01A end first, under finger-pressure. Controlled hot-plugging or equivalent. The contents of the ABCU-5700/5710RZ is ensured by design and by 3-stage pin sequencing at serial ID memory are defined in Table 10 as specified in the electrical interface to the host board. The module the SFP MSA. housing makes initial contact with the host board EMI Controller and Data I/O shield, mitigating potential damage due to Electro-Static Discharge (ESD). The module pins sequentially contact Data I/Os are designed to accept industry standard the (1) Ground, (2) Power, and (3) Signal pins of the host differential signals. In order to reduce the number of board surface mount connector. This printed circuit passive components required on the customers board, board card-edge connector is depicted in Figure 2. Avago Technologies has included the functionality of the transmitter bias resistors and coupling capacitors within TX DISABLE the module. The transceiver is compatible with an ac- TX DATA coupled configuration and is internally terminated. RX DATA Figure 1 depicts the functional diagram of the ABCU- 5700/5710RZ. 100-ohm resistor shown at RX LOS in RJ45 SerDes/ Figure 1 refers to ABCU-5710RZ configuration, not ABCU- RX LOS 100 Magnetics Adapter DSP 5700RZ configuration. MOD DEF2 Caution should be taken into account for the proper MOD DEF1 interconnection between the supporting Physical Layer MOD DEF0 100 integrated circuits and the ABCU-5700/5710RZ. Figure 4 illustrates the recommended interface circuit. Several control data signals and timing diagrams are EEPROM implemented in the module and are depicted in Figure 6. Figure 1. Transceiver Functional Diagram PIN 1 PIN 8 20 V T 1 V T EE EE 19 TD- 2 TX FAULT 18 TD+ 3 TX DISABLE 17 V T 4 MOD-DEF(2) EE 16 V T 5 MOD-DEF(1) CC 15 V R 6 MOD-DEF(0) CC 14 V R 7 Rate Select EE 13 RD+ 8 LOS 12 RD- 9 V R EE 11 V R 10 V R Figure 3. MDI ( RJ 45 Jack) Pin Assignment EE EE Bottom of Board Top of Board (as viewed thru top of board) Note: TxFault , LOS and Rate Select not used. Figure 2. 20-pin Connection Diagram of Module Printed Circuit Board 2