ALM-32120 0.7GHz 1.0GHz 2 Watt High Linearity Amplifier Data Sheet Description Features Avago Technologies ALM-32120 is a high linearity 2 Watt Fully matched, input and output PA with good OIP3 performance and exceptionally good High linearity and P1dB PAE at 1dB gain compression point, achieved through the Unconditionally stable across load condition use of Avago Technologies proprietary 0.25um GaAs En - hancement-mode pHEMT process. Built-in adjustable temperature compensated internal bias circuitry All matching components are fully integrated within the 1 GaAs E-pHEMT Technology module. This makes the ALM-32120 extremely easy to use. The adjustable temperature-compensated internal bias 5V supply circuit allows the device to be operated at either class A Excellent uniformity in product specifications or class AB operation. The ALM-32120 is housed inside a 3 Tape-and-Reel packaging option available miniature 7.0 x 10.0 x 1.1 mm 20-lead multiple-chips-on- board (MCOB) module package. MSL-3 and Lead-free High MTTF for base station application Component Image 3 7.0 x 10.0 x 1.1mm 20-Lead MCOB Package Specifications Vdd1 Vctrl 900MHz 5V, 800mA (typical) 18 19 20 1 17 14.3 dB Gain 16 2 52.0 dBm Output IP3 15 34.4 dBm Output Power at 1dB Gain Compression 3 32120 50.3% PAE at P1dB WWYY 4 RF OUT 14 RF IN 2.5dB Noise Figure XXXX 5 13 Applications 6 12 11 Class A driver amplifier for GSM / W-CDMA / WiMAX 7 9 10 8 base stations. Vdd2 Not Used General purpose gain block. Top View Bottom View Note: Note: 1. Enhancement mode technology employs positive gate voltage, Package marking provides orientation and identification thereby eliminating the need of negative gate voltage associated with conventional depletion mode devices. 32120 = Device Part Number WWYY = Work week and year of manufacture 2. Good RF practice requires all unused pins to be earthed. XXXX = Last 4 digit of lot number Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 100 V ESD Human Body Model = 350 V Refer to Avago Application Note A004R: Electrostatic Discharge, Damage and Control. 2 Absolute Maximum Rating T =250C A 3 Absolute Thermal Resistance = 12C/W jc Symbol Parameter Units Max. (Vdd=5, Ids=800mA, Tc=85C) Notes: V Device Voltage, RF output to ground V 5.5 dd,max 2. Operation of this device in excess of any of I Device Drain Current mA 1500 ds,max these limits may cause permanent damage. 3. Thermal resistance measured using Infra-Red V Control Voltage V 5.5 ctrl,max measurement technique. P CW RF Input Power dBm 28 in,max 4. This is limited by maximum Vdd and Ids. 4 Derate 83.3mW/ 0C for Tc > 51.0 0C. P Total Power Dissipation W 8.25 diss LSL T LSL Junction Temperature USL C 150 j, max T Storage Temperature C -65 to 150 STG LSL LSL 5 USL Product Consistency Distribution Charts LSL LSL USL .700 .800 .900 48 49 50 51 52 53 54 CPK = 1.592 CPK = 1.81 .700 .800 .900 48 49 50 51 52 53 54 Std Dev = 0.018 Std Dev = 0.642 .700 .800 .900 48 49 50 51 52 53 54 Figure 1. Ids LSL = 690mA, nominal = 800mA, USL = 910mA Figure 2. OIP3 LSL = 48dBm, nominal = 52dBm LSL LSL LSL 33 33.5 34 34.5 35 45 46 47 48 49 50 51 52 53 54 55 CPK = 5.690 Std Dev = 0.521 Std Dev = 0.050 33 33.5 34 34.5 35 45 46 47 48 49 50 51 52 53 54 55 Figure 3. P1dB LSL = 33dBm, nominal = 34.4dBm Figure 4. PAE at P1dB nominal = 50.3% 33 33.5 34 34.5 35 45 46 47 48 49 50 51 52 53 54 55 LSL USL Note: 5. Distribution data sample size is 500 samples taken from 3 different wafer lots. T = 25C, Vdd = 5V, Vctrl = 5V, RF performance at 900MHz A LSL USL unless otherwise specified. Future wafers allocated to this product may have nominal values anywhere between the upper and lower CPK = 3.598 limits. Std Dev = 0.086 6. Measurements are made on a production test board. Input trace LSL USL losses have not been de-embedded from actual measurements. 12 12.5 13 13.5 14 14.5 15 15.5 16 Figure 5. Gain LSL=12.5dB, Nominal = 14.3dB, USL=15.5dB 2 12 12.5 13 13.5 14 14.5 15 15.5 16 12 12.5 13 13.5 14 14.5 15 15.5 16