HCPL-261A, HCPL-061A, HCPL-263A, HCPL-063A HCPL-261N, HCPL-061N, HCPL-263N, HCPL-063N HCMOS Compatible, High CMR, 10 MBd Optocouplers Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available -xxxE denotes a lead-free product Description Features The HCPL-261A family of optically coupled gates shown HCMOS/LSTTL/TTL performance compatible on this data sheet provide all the benefits of the in - 1000 V/s minimum Common Mode Rejection (CMR) dustry standard 6N137 family with the added benefit at V = 50 V (HCPL-261A family) and 15 kV/s CM of HCMOS compatible input cur rent. This allows direct minimum CMR at V = 1000 V (HCPL-261N family) CM interface to all common circuit topologies without High speed: 10 MBd typical additional LED buffer or drive components. The Al - GaAs LED used allows lower drive currents and reduc- AC and DC performance specified over industrial es degradation by using the latest LED tech nol ogy. On temperature range -40C to +85C the single channel parts, an enable output allows the de- Available in 8 pin DIP, SOIC-8 packages tector to be strobed. The output of the detector IC is an Safety approval: open collector schottky-clamped transistor. The internal UL recognized per UL1577 3750 V rms for 1 minute shield provides a mini mum common mode transient im- and 5000 V for 1 minute (Option 020) munity of 1000 V/s for the HCPL-261A family and 15000 rms V/s for the HCPL-261N family. CSA Approved IEC/EN/DIN EN 60747-5-5 approved Functional Diagram Applications HCPL-261A/261N HCPL-263A/263N HCPL-061A/061N HCPL-063A/063N Low input current (3.0 mA) HCMOS compatible NC 1 8 V ANODE 1 8 V CC CC 1 version of 6N137 optocoupler V ANODE 2 7 V CATHODE 2 7 E 1 O1 Isolated line receiver V V CATHODE 3 6 CATHODE 3 6 O 2 O2 Simplex/multiplex data transmission NC 4 5 GND ANODE 4 5 GND 2 Computer-peripheral interface SHIELD SHIELD Digital isolation for A/D, D/A conversion TRUTH TABLE TRUTH TABLE Switching power supplies (POSITIVE LOGIC) (POSITIVE LOGIC) LED ENABLE OUTPUT LED OUTPUT Instrumentation input/output isolation ON H L ON L OFF H H OFF H Ground loop elimination ON L H OFF L H Pulse transformer replacement ON NC L OFF NC H The connection of a 0.1 F bypass capacitor between pins 5 and 8 is required. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.Selection Guide Widebody Input Minimum CMR 8-Pin DIP (300 Mil) Small-Outline SO-8 (400 Mil) Hermetic On- Single Dual Single Dual Single Single and dV/dt V Current Output Channel Channel Channel Channel Channel Dual Channel CM (V/s) (V) (mA) Enable Package Package Package Package Package Packages 1 1 1 NA NA 5 YES 6N137 HCPL-0600 HCNW137 1 1 NO HCPL-2630 HCPL-0630 1 1 1 5,000 50 YES HCPL-2601 HCPL-0601 HCNW2601 1 1 NO HCPL-2631 HCPL-0631 1 1 1 10,000 1,000 YES HCPL-2611 HCPL-0611 HCNW2611 1 1 NO HCPL-4661 HCPL-0661 1 1,000 50 YES HCPL-2602 1 3,500 300 YES HCPL-2612 1,000 50 3 YES HCPL-261A HCPL-061A NO HCPL-263A HCPL-063A 2 1,000 1,000 YES HCPL-261N HCPL-061N NO HCPL-263N HCPL-063N 3 1 1,000 50 12.5 HCPL-193x 1 HCPL-56xx 1 HCPL-66xx Notes: 1. Technical data are on separate Avago publications. 2. 15 kV/s with V = 1 kV can be achieved using Avago application circuit. CM 3. Enable is available for single channel products only, except for HCPL-193x devices. Schematic HCPL-261A/261N HCPL-263A/263N HCPL-063A/063N HCPL-061A/061N I I F CC I CC V CC V CC 8 2+ 8 1 I F1 I O1 I O V + O1 V O 7 6 V F1 V F 2 SHIELD GND 3 5 SHIELD I E 7 3 I F2 V I E O2 V O2 6 USE OF A 0.1 F BYPASS CAPACITOR CONNECTED V F2 BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 16). + 4 GND 5 SHIELD 2