HCPL-2200-300E Broadcom

HCPL-2200, HCPL-2219 Low Input Current Logic Gate Optocouplers Data Sheet Description Features The HCPL-2200/2219 are optically coupled logic gates 2.5 kV/ s minimum Common Mode Rejection (CMR) at that combine a GaAsP LED and an integrated high gain V = 400 V (HCPL-2219) CM photo detector. The detector has a three state output Compatible with LSTTL, TTL, and CMOS logic stage and has a detector threshold with hysteresis. The Wide V range (4.5 to 20 V) CC three state output eliminates the need for a pullup 2.5 Mbd guaranteed over temperature resistor and allows for direct drive of data busses. The hysteresis provides differential mode noise immunity Low input current (1.6 mA) and eliminates the potential for output signal chatter. Three state output (no pullup resistor required) Guaranteed performance from 0C to 85C A superior internal shield on the HCPL-2219 guarantees Hysteresis common mode transient immunity of 2.5 kV/ s at a Safety approval common mode voltage of 400 volts. UL recognized -3750 V rms for 1 minute CSA approved The Electrical and Switching Characteristics of the IEC/EN/DIN EN 60747-5-2 approved with HCPL-2200/2219 are guaranteed over the tempera- V = 630 V peak (HCPL-2219 Option 060 only) IORM ture range of 0 C to 85 C and a V range of 4.5 volts to CC MIL-PRF-38534 hermetic version available 20 volts. Low I and wide V range allow compatibility F CC (HCPL-5200/1) with TTL, LSTTL, and CMOS logic and result in lower power consumption compared to other high speed optocouplers. Logic signals are transmitted with a Applications typical propagation delay of 160 nsec. Isolation of high speed logic systems The HCPL-2200/2219 are useful for isolating high Computer-peripheral interfaces speed logic interfaces, buffering of input and output Microprocessor system interfaces lines, and implementing isolated line receivers in Ground loop elimination high noise environments. Pulse transformer replacement Isolated buss driver Functional Diagram High speed line receiver NC 1 8 V CC TRUTH TABLE (POSITIVE LOGIC) ANODE 2 7 V O LED ENABLE OUTPUT ON H Z OFF H Z CATHODE 3 6 V E ON L H OFF L L NC 4 5 GND SHIELD A 0.1 F bypass capacitor must be connected between pins 5 and 8. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.Selection Guide Small-Outline Widebody Minimum CMR 8-Pin DIP (300 Mil) SO-8 (400 Mil) Hermetic Input On- Single Dual Single Single Single and Dual dV/dt V Current Channel Channel Channel Channel Channel CM (V/ s) (V) (mA) Package Package Package Package Packages 1 1,000 50 1.6 HCPL-2200 HCPL-0201 HCNW2201 HCPL-2201 HCPL-2202 1.8 HCPL-2231 1 2,500 400 1.6 HCPL-2219 2 2 5,000 300 1.6 HCPL-2211 HCPL-0211 HCNW2211 HCPL-2212 1.8 HCPL-2232 1,000 50 2.0 HCPL-52XX HCPL-62XX Notes: 1. HCPL-2200/2219 devices include output enable/disable functionality. 2. Minimum CMR of 10 kV/ s with V = 1000 V can be achieved with input current, I , of 5 mA. CM F 2