HFBR-5961LZ/ALZ/GZ/AGZ Multimode Small Form Factor (SFF) Transceivers for ATM, FDDI, Fast Ethernet and SONET OC-3/SDH STM-1 with LC connector Data Sheet Description Features Multisourced 2 x5 package style The HFBR-5961xxZ transceiver from Avago provides the system designer with a product to implement a range of Operates with 62.5/125 m and 50/125 m multimode solutions for multimode fiber Fast Ethernet and SONET fiber OC-3 (SDH STM-1) physical layers for ATM and other Single+3.3 V power supply services. Wave solder and aqueous wash process compatibil- ity This transceiver is supplied in the industry standard 2 x 5 DIP style with an LC fiber connector interface with an Manufactured inan ISO 9001 certifiedfacilit y external connector shield. Fullc ompliance withA TMF orum UNI SONET OC-3 multimode fiber physical layer speci- Transmitter Section fication The transmitter section of the HFBR-5961xxZ utilizes Full compliance with the optical performance require- a 1300 nm InGaAsP LED. This LED is packaged in the ments of the FDDI PMD standard optical subassembly portion of the transmitter section. Full compliance with the optical performance require- It is driven by a custom silicon IC which converts differ - ments of100Base -FXv ersionof IEEE802.3u ential PECL logic signals, ECL referenced (shifted) to a RoHSc ompliant +3.3 Vsupply ,in toan analog LEDdr ive current. PECLSig nalD etectO utput Receiver Section Temperature range: HFBR-5961LZ 0 C to +70 C The receiver section of the HFBR-5961xxZ utilizes an InGaAs PIN photodiode coupled to a custom silicon HFBR-5961ALZ -40 Ct o +85 C transimpedance preamplifier IC. It is packaged in the HFBR-5961GZ 0 C to +70 C (No EMI shield) optical subassemblypor tionof the r eceiver. HFBR-5961AGZ -40 C to+85 C (NoEMI shield) This PIN/preamplifier combination is coupled to a Applications custom quantizer IC which provides the final pulse SONET/SDH equipment interconnect,OC-3/SDH shaping for the logic output and the Signal Detect STM-1r ate function. The Data output is differential. The Signal Detect output is single ended. Both Data and Signal Fast Ethernet Detect outputs are PECL compatible, ECL referenced Multimode fiber ATM backbonelinks (shifted) to a +3.3 V power supply. The receiver outputs, Data Output and Data Out Bar, are squelched at Signal Detect deassert. That is, when the light input power decreases to a typical -38 dBm or less, the Signal Detect deasserts, ie. the Signal Detect output goes to a PECL low state. This forces the receiver outputs, Data Out and Data Out Bar to go steady PECL levels high and low respectively.Package The overall package concept for the Avago transceiver The receiver section includes an internal shield for the consists of three basic elements the two optical subas- electrical and optical subassemblies to ensure high semblies, an electrical subassembly, and the housing as immunity to external EMIfields . illustratedin the block diag ram inF igure 1. The outer housing including the LC ports is molded The package outline drawing and pin out are shown in of filled nonconductive plastic to provide mechani- Figures 2 and 5. The details of this package outline and cal strength. The solder posts of the Avago design are pin out are compliant with the multisource definition of isolatedfr omthe in ternal circuit of thetr ansceiver. the 2 x 5 DIP. The low profile of the Avago transceiver The transceiver is attached to a printed circuit board design complies with the maximum height allowed for with the ten signal pins and the two solder posts which the LCc onnector overthe en tire length ofthe package. exit the bottom of the housing. The two solder posts The optical subassemblies utilize a high-volume provide the primary mechanical strength to withstand assembly process together with low-cost lens elements the loads imposed on the transceiver by mating with which result in ac osteff ective building block. theL Cc onnector fiber cables. The electrical subassembly consists of a high volume multilayer printed circuit board on which the ICs and various surface mounted passive circuit elements are attached. R SUPPLY X DATA OUT QUANTIZER IC PIN PHOTODIODE DATA OUT PRE-AMPLIFIER SUBASSEMBLY R GROUND SIGNAL X LC DETECT RECEPTACLE T GROUND X LED DATA IN OPTICAL LED DRIVER IC SUBASSEMBLY DATA IN T SUPPLY X Figure 1. Block Diagram 2