MGA-565P8 20 dBm P High Isolation Buffer Amplifier sat Data Sheet Description Features Up to 3.5 GHz operating frequency The MGA-565P8 is designed for use in LO chains to drive high dynamic range passive mixers. It provides high 2:1 VSWR input and output at 2GHz isolation, high gain, and consistent output power. It is Small package size: a GaAs MMIC, fabricated using Avago Technologies cost 3 2.0 x 2.0 x 0.75 mm LPCC effective, reliable enhancement mode PHEMT (Pseu- MSL-1 and lead-free 1 domorphic High Electron Mobility Transistor) process. Tape-and-reel packaging option available This device is housed in the LPCC 2x2 mm package. This package offers good thermal dissipation and RF charac - Specifications teristics. 2 GHz, V = 5 V, P = 0 dBm d in MGA-565P8 features a saturated power of 20 dBm (with 0 dBm input power) and reverse isolation in excess of P = 20 dBm sat 40 dB at 2 GHz. The saturated output power can be set I = 67 mA dsat between 9 dBm and 20 dBm using an external resistor, Isolation = 42 dB with a corresponding adjustment in current consump- Small Signal Gain = 22 dB tion. Notes: Applications 1. Enhancement mode technology employs a single positive V , gs eliminating the need of negative gate voltage associated with VCO buffer amplifier for Cellular/PCS or other wireless conventional depletion mode devices. infrastructures 2. Conform to JEDEC reference outline MO229 for DRP-N Simplified Schematic Pin Connections and Package Marking Vd Pin 8 GND Pin 1 GND Id Pin 7 Pin 2 (RFin) (RFout/VD1) Rbias Pin 6 (VD2) Pin 3 GND 5 6 Pin 5 (VD3) Pin 4 GND 2 7 LO Bottom View RFout RFin Pin 1 Pin 8 1,3,4,8 Pin 2 Pin 7 GND 1Bx Pin 3 Pin 6 Pin 4 Pin 5 Attention: Observe precautions for handling electrostatic sensitive devices. Top View ESD Machine Model (Class A) Note: ESD Human Body Model (Class 0) Package marking provides orientation and identification Refer to Avago Application Note A004R: 1B = Device Code Electrostatic Discharge Damage and Control. x = Data code indicates the month of manufacture. (Thermal/RF Gnd) 1 MGA-565P8 Absolute Maximum Ratings Notes: Absolute 1. Operation of this device in excess of Symbol Parameter Units Maximum any one of these parameters may cause permanent damage. V DC Supply Voltage V 8 2. Board (package belly) temperature T is d B 25C. Derate 11 mW/C for T > 109C. 2 B P Total Power Dissipation mW 448 diss 3. Channel-to-board thermal resistance P max. RF Input Power (Vd = 5V) dBm 15 measured using 150C Liquid Crystal in Measurement method. T Channel Temperature C 150 CH T Storage Temperature C -65 to 150 STG 3 Thermal Resistance C/W 91 ch b ESD (Human Body Model) V 100 ESD (Machine Model) V 30 Electrical Specifications T = 25C, Frequency = 2 GHz, R = 0 (unless specified otherwise) A bias Symbol Parameter and Test Condition Units Min. Typ. Max. 1 P Saturated Power at 0 dBm input Vd = 5V dBm 18.5 20 sat Vd = 3V dBm 17 1 I Saturation Current Vd = 5V mA 58 67 dsat Vd = 3V mA 45 1 ISL Reverse Isolation dB 42 50 1 Gain Small Signal Gain Vd = 5V dB 20 21.8 23.5 Vd = 3V 20 1 I Small Signal Current (P = -10 dBm) Vd = 5V mA 33 37 ds in Vd = 3V 27 1 RL Return Loss Input dB -8 Output -10 Notes: 1. Typical value determined from a sample size of 500 parts from 3 wafers. 2. Measurement obtained using production test board described in the block diagram below. Circuit losses have been de-embedded from actual measurements. + 1000pF 5V R bias 0Ohm 22pF 12nH 5 6 Buffer Amplifier 2 7 22pF 22pF 1 3 4 8 Figure 1. Production Test Circuit Schematic at 2 GHz. 2