MGA-68563 Current-Adjustable, Low Noise Amplifier Data Sheet Description Features Avago Technologies MGA-68563 is an economical, easy- Single +3V supply to-use GaAs MMIC amplifier that offers excellent linearity High linearity and low noise figure for applications from 0.1 to 1.5 GHz. Packaged in an miniature SOT-363 package, it requires Low noise figure half the board space of a SOT-143 package. Miniature package One external resistor is used to set the bias current from Unconditionally stable 5mA to 30mA. This allows the designer to use the same part in several circuit positions and tailor the linearity Specifications at 500 MHz 3V, 10 mA (Typ.) performance (and current consumption) to suit each 1.0 dB noise figure position. 20 dBm OIP3 The output of the amplifier is matched to 50 (below 2:1 VSWR) across the entire bandwidth and only requires 19.7 dB gain minimum input matching. The amplifier allows a wide * This represents what Avago Technologies has managed dynamic range by offering a 1.0 dB NF coupled with a to achieve on a device level with trade off between +20 dBm Output IP3. The circuit uses state-of-the-art optimal NF, Gain, OIP3 and input return loss. E-pHEMT technology with proven reliability. On-chip bias circuitry allows operation from a single +3V power sup- ply, while internal feedback ensures stability (K>1) over all frequencies for Id at 10mA and above. Attention: Observe precautions for handling electrostatic sensitive devices. Applications ESD Machine Model (Class A) ESD Human Body Model (CLass 1A) LNA for DVB-T,DVB-H, T-DMB, ISDB-T, DAB and Media- Refer to Agilent Application Note A004R: FLO Electrostatic Discharge Damage and Control.6Cx Pin Connections and Package Marking Simplified Schematic Vd I bias Id = I + I ds bias R bias I ds Note: Feedback Package marking V bias provides orientation OUTPUT GND 1 6 and V and identification: d 4 Input RFout 6C = Device Code 6 GND 2 5 GND match x = Date code RFin 3 indicates the month INPUT 3 4 BIAS of manufac- Bias ture. 1, 2, 5 GND 1 MGA-68563 Absolute Maximum Ratings Notes: Absolute 1. Operation of this device above any one of Symbol Parameter Units Maximum these parameters may cause permanent damage. 2 V Device Voltage (pin 6) V6 d 2. Bias is assumed at DC quiescent conditions. 2 I Device Current (pin 6) mA 100 3. With the DC (typical bias) and RF applied to d the device at board temperature TB = 25C. P CW RF Input (pin3) in 4. Total dissipation power is referred to lead 3 (Vd=3V, Id=10mA) dBm 21 5 temperature. Tc=92C, derate Pdiss at (Vd=0V, Id=0mA) dBm 21 10.3mW/C for Tc>92C. 5. Thermal resistance measured using 150C I Bias Reference Current (pin 4) mA 1 ref Liquid Crystal Measurement method. 4 P Total Power Dissipation mW 600 diss T Channel Temperature C 150 CH T Storage Temperature C 150 STG 5 Thermal Resistance C/W 97 ch b Wire Supplying Vbias from + 10 nF Agilent 4142 3V Blocking Cap RF Input 68 pF 47 nH Direct to 4300 Ground Direct to Ground 4 Bias 6.8 nH RF Output Bias MGA-68563 Tee 3 6 100 pF 100 pF 1 25 Vdd supply from Reference Agilent 4142 Planes Figure 1a. Test circuit of the 0.5 GHz production test board used for NF, Gain Figure 1b. A diagram showing the connection to the DUT during an S and and OIP3 measurements. This circuit achieves a trade-off between optimal Noise parameter measurement using an automated tuner system. NF, Gain, OIP3 and input return loss. Circuit losses have been de-embedded from actual measurements. 2 6Cx