MGA-725M4 Low Noise Amplifier with Bypass Switch In Miniature Leadless Package Data Sheet Description Features Operating frequency: Avago Technologiess MGA-725M4 is an economical, 0.1 GHz ~ 6.0 GHz easy-to-use GaAs MMIC Low Noise Ampliefi r (LNA), which is designed for an adaptive CDMA receiver LNA and Noise figure: adaptive CDMA transmit driver amplifier. 1.2 dB at 800 MHz 1.4 dB at 1900 MHz The MGA-725M4 features a typical noise figure of 1.4 dB Gain: and 14.4 dB associated gain from a single stage, feedback 17.5 dB at 800 MHz FET amplifier. The output is internally matched to 50. 15.7 dB at 1900 MHz The input is optimally internally matched for lowest noise gfi ure into 50. The input may be additionally externally Bypass switch on chip matched for low VSWR through the addition of a single Loss = typ 1.6 dB (I < 5 A) d series inductor. When set into the bypass mode, both IIP3 = +10 dBm input and output are internally matched to 50. Adjustable Input IP3: +2 to +14.7 dBm The MGA-725M4 oeff rs an integrated solution of LNA with adjustable IIP3. The IIP3 can be fixed to a desired Miniature package: current level for the receivers linearity requirements. The 1.4 mm x 1.2 mm LNA has a bypass switch function, which sets the current 2.7 V to 5.0 V operation to zero and provides low insertion loss. The bypass mode also boosts dynamic range when high level signal is Applications being received. CDMA (IS-95, J-STD-008) Receiver LNA For the CDMA driver amplifier applications, the Transmit Driver Amp MGA-725M4 provides suitable gain and linearity to meet TDMA (IS-136) handsets the ACPR requirement when the handset transmits the highest power. When transmitting lower power, the MiniPak 1.4 mm x 1.2 mm Package MGA-725M4 can be bypassed, saving the drawing current. The MGA-725M4 is a GaAs MMIC, processed on Avagos cost effective PHEMT (Pseudomorphic High Electron Mobility Transistor). It is housed in the MiniPak 1412 package. It is part of the Avago Technologies CDMAdvan- tage RF chipset. Simplified Schematic Pin Connections and Package Marking OUTPUT GROUND Ax Control INPUT GROUND Input Output & &V d V ref GainFET GND GND Ax 1 MGA-725M4 Absolute Maximum Ratings 2 Thermal Resistance: Symbol Parameter Units Absolute Operation = 180C/W jc Maximum Maximum Notes: V Maximum Input to Output Voltage V 5.5 4.2 1. Operation of this device in excess of any of d these limits may cause permanent dam- V Maximum Input to Ground DC Voltage V +.3 +.1 gs age. -5.5 -4.2 2. T = 25C. case I Supply Current mA 70 60 d 1,2 P Power Dissipation mW 300 250 d P CW RF Input Power dBm +20 +13 in T Junction Temperature C 170 150 j T Storage Temperature C -65 to +150 -40 to +85 STG Electrical Specifications, T = +25C, Z = 50, I = 20 mA, V = 3 V, unless noted. c o d d Symbol Parameter and Test Condition Units Min. Typ. Max. 1 V test f = 2.0 GHz V = 3.0V (V = 2.5V) I = 20 mA V -0.65 -0.51 -0.37 0.035 gs d ds d 1 NF test f = 2.0 GHz V = 3.0V (= V - V ) I = 20 mA dB 1.4 1.8 0.06 d ds gs d 1 Ga test f = 2.0 GHz V = 3.0V (= V - V ) I = 20 mA dB 13.5 14.4 15.5 0.42 d ds gs d 1 IIP3 test f = 2.04 GHz V = 3.0V (= V - V ) I = 20 mA dBm 8.5 9.9 0.35 d ds gs d 1,4 IL test f = 2.0 GHz V = 3.0V (V = 0V, V = -3V) I = 0.0 mA dB 1.6 3.5 0.07 d ds gs d 1,4 Ig test f = 2.0 GHz V = 3.0V (V = 0V, V = -3V) I = 0.0 mA A 2.0 2.0 d ds gs d 2 Nfo Minimum Noise Figure f = 1.0 GHz dB 1.2 As measured in Figure 2 Test Circuit f = 1.5 GHz 1.2 (Computed from s-parameter and noise f = 2.0 GHz 1.3 parameter performance as measured in a f = 2.5 GHz 1.3 50 impedance fixture) f = 4.0 GHz 1.4 f = 6.0 GHz 1.6 2 Gain Associated Gain at Nfo f = 1.0 GHz dB 17.6 As measured in Figure 2 Test Circuit f = 1.5 GHz 16.6 (Computed from s-parameter and noise f = 2.0 GHz 15.7 parameter performance as measured in a f = 2.5 GHz 14.8 50 impedance fixture) f = 4.0 GHz 12.8 f = 6.0 GHz 10.6 1 P1dB Output Power at 1 dB Gain Compression I = 0 mA dBm 15.2 d As measured in Figure 1 Test Circuit I = 5 mA 3.4 d Frequency = 2.04 GHz I = 10 mA 9.14 d I = 20 mA 13.13 0.53 d I = 40 mA 15.25 d I = 60 mA 16.16 d 1 IIP3 Input Third Order Intercept Point I = 0 mA dBm 35 d As measured in Figure 1 Test Circuit I = 5 mA 3.1 d Frequency = 2.04 GHz I = 10 mA 6.6 d I = 20 mA 9.9 0.35 d I = 40 mA 13.0 d I = 60 mA 14.7 d 1 RLin Input Return Loss as measured in Fig. 1 f = 2.0 GHz dB -8.2 0.41 1 RLout Output Return Loss as measured in Fig. 1 f = 2.0 GHz dB -15 1.3 1 2 ISOL Isolation S As measured in Fig. 2 f = 2.0 GHz dB -23.4 0.4 12 Notes: 1. Standard deviation and typical data as measured in the test circuit of Figure 1. Data based on 500 part sample size from 3 wafer lots. 2. Typical data computed from S-parameter and noise parameter data measured in a 50 system. 3. V = total device voltage = V d dg 4. Bypass mode voltages shown are used in production test. For source resistor biasing, Bypass mode is set by opening the source resistor. 2