CS4244 4 In/4 Out Audio CODEC with PCM and TDM Interfaces DAC Features System Features TDM, left justified, and IS serial inputs and outputs Advanced multibit delta-sigma modulator IC host control port 24-bit resolution Supports logic levels between 5 and 1.8 V Differential or single-ended outputs Supports sample rates up to 96 kHz Dynamic range (A-weighted) Common Applications -109 dB differential Automotive audio systems -105 dB single-ended AV, Blu-Ray Disc, and DVD receivers THD+N Audio interfaces, mixing consoles, and effects -90 dB differential processors -88 dB single ended General Description 2 Vrms full-scale output into 3-k AC load The CS4244 provides four multibit analog-to-digital and Rail-to-rail operation four multi-bit digital-to-analog - converters and is compatible with differential inputs and either differential ADC Features or single-ended outputs. Digital volume control, noise Advanced multibit delta-sigma modulator gating, and muting is provided for each DAC path. A se- lectable high-pass filter is provided for the 4 ADC inputs. 24-bit resolution The CS4244 supports master and slave modes and Differential inputs TDM, left-justified, and IS modes. -105 dB dynamic range (A-weighted) This product is available in a 40-pin QFN package in -88 dB THD+N Automotive (-40C to +85C) and Commercial (0C to +70C) temperature grades. The CDB4244 Customer 2 Vrms full-scale input Demonstration Board is also available for device evalu- ation and implementation suggestions. See Ordering Information on page 64 for complete details. VA VDREG 5.0 VDC 2.5 V LDO Analog Supply AIN1 () AIN2 () AIN3 () Multi-bit AIN4 () ADC AOUT1 () Master AOUT2 () Volume Channel Volume , DAC & AOUT3 () Interpolation Multi-bit Control Mute, Invert, Analog AOUT4 () Filter Modulators Digital Filters Noise Gate Filters Serial Audio Interface Control Port Level Translator 2 SDOUT1 SDOUT2 SDIN2 SDIN1 Frame Sync Master Clock In Serial Clock INT I C Control RST Clock / LRCK In/Out Data VL 1.8 to 5.0 VDC Copyright Cirrus Logic, Inc. 2014 OCT 14 (All Rights Reserved) DS900F2 CS4244 TABLE OF CONTENTS 1. PIN DESCRIPTIONS ............................................................................................................................ 5 1.1 I/O Pin Characteristics ...................................................................................................................... 6 2. TYPICAL CONNECTION DIAGRAM ................................................................................................... 7 3. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 8 RECOMMENDED OPERATING CONDITIONS ..................................................................................... 8 ABSOLUTE MAXIMUM RATINGS ......................................................................................................... 8 DC ELECTRICAL CHARACTERISTICS ................................................................................................ 9 TYPICAL CURRENT CONSUMPTION ................................................................................................ 10 ANALOG INPUT CHARACTERISTICS (COMMERCIAL GRADE) ...................................................... 11 ANALOG INPUT CHARACTERISTICS (AUTOMOTIVE GRADE) ....................................................... 12 ADC DIGITAL FILTER CHARACTERISTICS ....................................................................................... 14 ANALOG OUTPUT CHARACTERISTICS (COMMERCIAL GRADE) .................................................. 15 ANALOG OUTPUT CHARACTERISTICS (AUTOMOTIVE GRADE) ................................................... 16 COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE .............................. 17 DIGITAL I/O CHARACTERISTICS ....................................................................................................... 18 SWITCHING CHARACTERISTICS - SERIAL AUDIO INTERFACE .................................................... 19 SWITCHING SPECIFICATIONS - CONTROL PORT .......................................................................... 21 4. APPLICATIONS ................................................................................................................................... 22 4.1 Power Supply Decoupling, Grounding, and PCB Layout ............................................................... 22 4.2 Recommended Power-up & Power-down Sequence ..................................................................... 22 4.3 IC Control Port ............................................................................................................................... 24 4.4 System Clocking ............................................................................................................................. 26 4.5 Serial Port Interface ........................................................................................................................ 28 4.6 Internal Signal Path ....................................................................................................................... 31 4.7 Reset Line ...................................................................................................................................... 42 4.8 Error Reporting and Interrupt Behavior .......................................................................................... 42 5. REGISTER QUICK REFERENCE ........................................................................................................ 45 6. REGISTER DESCRIPTIONS ................................................................................................................ 47 6.1 Device I.D. AF (Address 01h03h) (Read Only) ....................................................................... 47 6.2 Revision I.D. (Address 05h) (Read Only) ....................................................................................... 47 6.3 Clock & SP Select (Address 06h) ................................................................................................... 48 6.4 Sample Width Select (Address 07h) ............................................................................................... 49 6.5 Serial Port Control (Address 08h) ................................................................................................... 49 6.6 Serial Port Data Select (Address 09h) ............................................................................................ 50 6.7 ADC Control 1 (Address 0Fh) ......................................................................................................... 51 6.8 ADC Control 2 (Address 10h) ......................................................................................................... 51 6.9 DAC Control 1 (Address 12h) ......................................................................................................... 52 6.10 DAC Control 2 (Address 13h) ....................................................................................................... 52 6.11 DAC Control 3 (Address 14h) ....................................................................................................... 53 6.12 DAC Control 4 (Address 15h) ....................................................................................................... 53 6.13 Volume Mode (Address 16h) ........................................................................................................ 54 6.14 Master and DAC1-4 Volume Control (Address 17h, 18h, 19h, 1Ah, & 1Bh) ................................ 55 6.15 Interrupt Control (Address 1Eh) .................................................................................................... 55 6.16 Interrupt Mask 1 (Address 1Fh) .................................................................................................... 56 6.17 Interrupt Mask 2 (Address 20h) .................................................................................................... 57 6.18 Interrupt Notification 1 (Address 21h) (Read Only) ...................................................................... 57 6.19 Interrupt Notification 2 (Address 22h) (Read Only) ...................................................................... 58 7. ADC FILTER PLOTS ............................................................................................................................ 59 8. DAC FILTER PLOTS ............................................................................................................................ 60 9. PACKAGE DIMENSIONS ................................................................................................................... 62 10. ORDERING INFORMATION .............................................................................................................. 63 11. REVISION HISTORY .......................................................................................................................... 63 DS900F2 2