CS42518
110 dB, 192-kHz 8-Ch CODEC with S/PDIF Receiver
Features General Description
Eight 24-bit D/A, two 24-bit A/D Converters
The CS42518 provides two analog-to-digital and eight
digital-to-analog delta-sigma converters, as well as an
110 dB DAC / 114 dB ADC Dynamic Range
integrated S/PDIF receiver.
-100 dB THD+N
The CS42518 integrated S/PDIF receiver supports up
System Sampling Rates up to 192 kHz
to eight inputs, clock recovery circuitry and format auto-
detection. The internal stereo ADC is capable of inde-
S/PDIF Receiver Compatible with EIAJ
pendent channel gain control for single-ended or
CP1201 and IEC-60958
differential analog inputs. All eight channels of DAC pro-
Recovered S/PDIF Clock or System Clock
vide digital volume control and differential analog
Selection
outputs. The general-purpose outputs may be driven
8:2 S/PDIF Input MUX
high or low, or mapped to a variety of DAC mute con-
trols or ADC overflow indicators.
ADC High-Pass Filter for DC Offset Calibration
The CS42518 is ideal for audio systems requiring wide
Expandable ADC Channels and One-Line
dynamic range, negligible distortion and low noise, such
Mode Support
as A/V receivers, DVD receivers, and digital speakers.
Digital Output Volume Control with Soft Ramp
The CS42518 is available in a 64-pin LQFP package in
Digital 15 dB Input Gain Adjust for ADC
Commercial (-10 to +70 C) grades. The CDB42518
Customer Demonstration board is also available for de-
Differential Analog Architecture
vice evaluation. Refer to Ordering Information on
Supports Logic Levels between 1.8 V and 5 V
page 90.
TXP VARX AGND LPFLT DGND DGND VD VD
RXP0
INT
RXP1/GPO1
RXP2/GPO2
C&U Bit RST
RXP3/GPO3 Control
Data Buffer
AD0/CS
Clock/Data S/PDIF
RXP4/GPO4 Port
AD1/CDIN
Rx
Recovery
RXP5/GPO5 Decoder
SDA/CDOUT
Format
RXP6/GPO6
SCL/CCLK
Detector
RXP7/GPO7
VLC
GPO
OMCK
MUTEC MUTE
Mult/Div RMCK
Internal MCLK
FILT+
Serial
VQ Ref SAI_LRCK
DEM Audio
REFGND
SAI_SCLK
Interface
VA SAI_SDOUT
Port
AGND
VLS
AINL+
ADC#1 Digital Filter Gain & Clip
ADC
AINL- ADCIN1
Serial
ADCIN2
Data
AINR+
ADC#2 Digital Filter Gain & Clip
AINR- CX_SDOUT
CX_LRCK
AOUTA1+
DAC#1
AOUTA1-
CX_SCLK
AOUTB1+
CX_SDIN1
DAC#2
AOUTB1-
CX_SDIN2
AOUTA2+
DAC#3
CX_SDIN3
AOUTA2- CODEC
Serial
CX_SDIN4
AOUTB2+
Port
DAC#4
AOUTB2-
AOUTA3+
DAC#5
AOUTA3-
AOUTB3+
DAC#6
AOUTB3-
AOUTA4+
DAC#7
AOUTA4-
AOUTB4+
DAC#8
AOUTB4-
Copyright Cirrus Logic, Inc. 2014 MAR '14
(All Rights Reserved)
DS584F2
CS42518
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 6
SPECIFIED OPERATING CONDITIONS ............................................................................................... 6
ABSOLUTE MAXIMUM RATINGS ......................................................................................................... 6
ANALOG INPUT CHARACTERISTICS .................................................................................................. 7
A/D DIGITAL FILTER CHARACTERISTICS .......................................................................................... 8
ANALOG OUTPUT CHARACTERISTICS .............................................................................................. 9
D/A DIGITAL FILTER CHARACTERISTICS ........................................................................................ 10
SWITCHING CHARACTERISTICS ......................................................................................................11
SWITCHING CHARACTERISTICS - CONTROL PORT - IC FORMAT ........................................... 12
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT .......................................... 13
DC ELECTRICAL CHARACTERISTICS .............................................................................................. 14
DIGITAL INTERFACE CHARACTERISTICS ....................................................................................... 15
2. PIN DESCRIPTIONS ............................................................................................................................ 16
3. TYPICAL CONNECTION DIAGRAM ............................................................................................... 19
4. APPLICATIONS ................................................................................................................................... 20
4.1 Overview ......................................................................................................................................... 20
4.2 Analog Inputs .................................................................................................................................. 20
4.2.1 Line-Level Inputs ................................................................................................................... 20
4.2.2 High-Pass Filter and DC Offset Calibration ........................................................................... 21
4.3 Analog Outputs ............................................................................................................................... 21
4.3.1 Line-Level Outputs and Filtering ........................................................................................... 21
4.3.2 Interpolation Filter .................................................................................................................. 21
4.3.3 Digital Volume and Mute Control ........................................................................................... 22
4.3.4 ATAPI Specification ............................................................................................................... 22
4.4 S/PDIF Receiver ............................................................................................................................. 23
4.4.1 8:2 S/PDIF Input Multiplexer ................................................................................................. 23
4.4.2 Error Reporting and Hold Function ........................................................................................23
4.4.3 Channel Status Data Handling .............................................................................................. 23
4.4.4 User Data Handling ............................................................................................................... 23
4.4.5 Non-Audio Auto-Detection ..................................................................................................... 23
4.5 Clock Generation ............................................................................................................................ 24
4.5.1 PLL and Jitter Attenuation ..................................................................................................... 24
4.5.2 OMCK System Clock Mode ...................................................................................................25
4.5.3 Master Mode ......................................................................................................................... 25
4.5.4 Slave Mode ........................................................................................................................... 25
4.6 Digital Interfaces ............................................................................................................................. 26
4.6.1 Serial Audio Interface Signals ............................................................................................... 26
4.6.2 Serial Audio Interface Formats .............................................................................................. 28
4.6.3 ADCIN1/ADCIN2 Serial Data Format .................................................................................... 31
4.6.4 One-Line Mode (OLM) Configurations .................................................................................. 32
4.6.4.1 OLM Config #1 ........................................................................................................... 32
4.6.4.2 OLM Config #2 ........................................................................................................... 33
4.6.4.3 OLM Config #3 ........................................................................................................... 34
4.6.4.4 OLM Config #4 ........................................................................................................... 35
4.6.4.5 OLM Config #5 ........................................................................................................... 36
4.7 Control Port Description and Timing ............................................................................................... 37
4.7.1 SPI Mode ............................................................................................................................... 37
4.7.2 IC Mode ................................................................................................................................ 38
4.8 Interrupts ........................................................................................................................................ 39
4.9 Reset and Power-Up ...................................................................................................................... 39
4.10 Power Supply, Grounding, and PCB Layout ................................................................................ 39
5. REGISTER QUICK REFERENCE ........................................................................................................ 41
2 DS584F2