CS5101A CS5102A 16-bit, 100 kSps / 20 kSps A/D Converters Features Description The CS5101A and CS5102A are 16-bit monolithic z Monolithic CMOS A/D Converters CMOS analog-to-digital converters (ADCs) capable of Inherent Sampling Architecture 100 kSps (5101A) and 20 kSps (5102A) throughput. The CS5102As low power consumption of 44mW, coupled 2-channel Input Multiplexer with a power-down mode, makes it particularly suitable Flexible Serial Output Port for battery-powered operation. On-chip self-calibration circuitry achieves nonlinearity of z Ultra-low Distortion 0.001% of FS and guarantees 16-bit, no missing codes S/(N+D): 92 dB over the entire specified temperature range. Superior lin- TDH: 0.001% earity also leads to 92 dB S/(N+D) with harmonics below -100 dB. Offset and full-scale errors are minimized dur- z Conversion Time ing the calibration cycle, eliminating the need for external trimming. CS5101A: 8s The CS5101A and CS5102A each consist of a 2-chan- CS5102A: 40 s nel input multiplexer, DAC, conversion and calibration microcontroller, clock generator, comparator, and serial z Linearity Error: 0.001% FS communications port. The inherent sampling architec- Guaranteed No Missing Codes ture of the device eliminates the need for an external track-and-hold amplifier. z Self-calibration Maintains Accuracy The converters 16-bit data is output in serial form with either binary or twos complement coding. Three output Accurate Over Time & Temperature timing modes are available for easy interfacing to micro- controllers and shift registers. Unipolar and bipolar input z Low Power Consumption ranges are digitally selectable CS5101A: 320 mW ORDERING INFORMATION CS5102A: 44 mW See Ordering Information on page 38. I HOLD SLEEPRST STBYCODEBP/UP CRS/FIN TRK1 TRK2 SSH/SDLSDATA 12 28 2 5 16 17 10 8 9 11 15 3 14 CLKIN Clock SCLK 4 Control XOUT Generator 21 REFBUF Calibration Microcontroller SRAM - 20 VREF + 26 TEST 19 AIN1 16-Bit Charge - 27 Redistribution - SCKMOD + 24 AIN2 DAC + 18 Comparator 13 OUTMOD - CH1/2 + 22 AGND 25 23 6 1 7 VA+ VA- DGND VD- VD+ Copyright Cirrus Logic, Inc. 2006 JAN 06 CS5101A CS5102A TABLE OF CONTENTS 1. CHARACTERISTICS & SPECIFICATIONS ............................................................................. 4 ANALOG CHARACTERISTICS, CS5101A............................................................................... 4 SWITCHING CHARACTERISTICS, CS5101A......................................................................... 6 ANALOG CHARACTERISTICS, CS5102A............................................................................... 7 SWITCHING CHARACTERISTICS, CS5102A......................................................................... 9 SWITCHING CHARACTERISTICS, ALL DEVICES ............................................................... 11 DIGITAL CHARACTERISTICS, ALL DEVICES...................................................................... 13 RECOMMENDED OPERATING CONDITIONS ..................................................................... 13 ABSOLUTE MAXIMUM RATINGS ......................................................................................... 14 2. OVERVIEW ............................................................................................................................. 15 3. THEORY OF OPERATION ..................................................................................................... 15 3.1 Calibration ........................................................................................................................ 16 4. FUNCTIONAL DESCRIPTION ............................................................................................... 17 4.1 Initiating Conversions ....................................................................................................... 17 4.2 Tracking the Input ............................................................................................................ 17 4.3 Master Clock .................................................................................................................... 18 4.4 Asynchronous Sampling Considerations ......................................................................... 18 4.5 Analog Input Range/Coding Format ................................................................................ 19 4.6 Output Mode Control ........................................................................................................19 4.6.1 Pipelined Data Transmission .............................................................................. 19 4.6.2 Register Burst Transmission (RBT) .................................................................... 20 4.6.3 Synchronous Self-clocking (SSC) ....................................................................... 20 4.6.4 Free Run (FRN) .................................................................................................. 20 5. SYSTEM DESIGN USING THE CS5101A & CS5102A ......................................................... 22 5.1 System Initialization ......................................................................................................... 22 5.2 Single-channel Operation ................................................................................................ 23 6. ANALOG CIRCUIT CONNECTIONS ...................................................................................... 23 6.1 Reference Considerations ............................................................................................... 23 6.2 Analog Input Connection ................................................................................................. 24 6.3 Sleep Mode Operation ..................................................................................................... 24 6.4 Grounding & Power Supply Decoupling ........................................................................... 25 7. CS5101A & CS5102A PERFORMANCE ............................................................................... 26 7.1 Differential Nonlinearity .................................................................................................... 26 7.2 FFT Tests and Windowing ............................................................................................... 28 7.3 Sampling Distortion .......................................................................................................... 30 7.4 Noise ................................................................................................................................ 31 7.5 Aperture Jitter .................................................................................................................. 31 7.6 Power Supply Rejection ................................................................................................... 32 8. PIN DESCRIPTIONS .............................................................................................................. 33 8.1 Power Supply Connections .............................................................................................. 33 8.2 Oscillator .......................................................................................................................... 34 8.3 Digital Inputs .................................................................................................................... 34 8.4 Analog Inputs ................................................................................................................... 35 8.5 Digital Outputs ................................................................................................................. 35 8.6 Analog Outputs ................................................................................................................ 35 8.7 Miscellaneous .................................................................................................................. 35 9. PARAMETER DEFINITIONS .................................................................................................. 36 10. PACKAGE DIMENSIONS ..................................................................................................... 37 11. ORDERING INFORMATION ................................................................................................ 38 12. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION .......................... 38 13. REVISIONS .......................................................................................................................... 39 2 DS45F6