CS5532/34-BS 24-bit ADCs with Ultra-low-noise PGIA Features General Description The CS5532/34 are highly integrated Analog-to-Digi- Chopper-stabilized PGIA (Programmable tal Converters (ADCs) which use charge-balance Gain Instrumentation Amplifier, 1x to 64x) techniques to achieve 24-bit performance. The ADCs 6 nV/ Hz 0.1 Hz (No 1/f noise) at 64x are optimized for measuring low-level unipolar or bipolar 1200 pA Input Current with Gains >1 signals in weigh scale, process control, scientific, and medical applications. Delta-sigma Analog-to-digital Converter Linearity Error: 0.0007% FS To accommodate these applications, the ADCs come as Noise-free Resolution: Up to 23 bits either two-channel (CS5532) or four-channel (CS5534) devices and include a very low-noise, chopper-stabilized Two- or Four-channel Differential MUX instrumentation amplifier (6 nV/Hz 0.1 Hz) with se- lectable gains of 1, 2, 4, 8, 16, 32, and 64. Scalable Input Span via Calibration These ADCs also include a fourth-order modulator 5 mV to differential 2.5V followed by a digital filter which provides twenty selectable Scalable V Input: Up to Analog Supply output word rates of 6.25, 7.5, 12.5, 15, 25, 30, 50, 60, 100, REF 120, 200, 240, 400, 480, 800, 960, 1600, 1920, 3200, and Simple Three-wire Serial Interface 3840 Sps (MCLK = 4.9152 MHz). SPI and Microwire Compatible To ease communication between the ADCs and a micro- Schmitt Trigger on Serial Clock (SCLK) controller, the converters include a simple three-wire se- R/W Calibration Registers Per Channel rial interface which is SPI and Microwire compatible with a Schmitt-trigger input on the serial clock (SCLK). Selectable Word Rates: 6.25 to 3,840 Sps High dynamic range, programmable output rates, and Selectable 50 or 60 Hz Rejection flexible power supply options makes these ADCs ideal solutions for weigh scale and process control Power Supply Configurations applications. VA+ = +5 V VA- = 0 V VD+ = +3 V to +5 V VA+ = +2.5 V VA- = -2.5 V VD+ = +3 V to +5 V ORDERING INFORMATION See page 47 VA+ = +3 V VA- = -3 V VD+ = +3 V VA+ C1 C2 VREF+ VREF- VD+ CS AIN1+ DIFFERENTIAL PGIA PROGRAMMABLE TH 4 ORDER SDI 1,2,4,8,16 AIN1- SINC FIR FILTER SERIAL 32,64 MODULATOR INTERFACE SDO AIN2+ MUX SCLK AIN2- (CS5534 AIN3+ SHOWN) AIN3- CLOCK CALIBRATION GENERATOR AIN4+ LATCH SRAM/CONTROL LOGIC AIN4- VA- A0/GUARD A1 OSC1 OSC2 DGND DEC 19 Copyright Cirrus Logic, Inc. 2010 CS5532/34-BS TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS ..........................................................4 ANALOG CHARACTERISTICS..........................................................................4 TYPICAL RMS NOISE (NV) ...............................................................................7 TYPICAL NOISE-FREE RESOLUTION(BITS)...................................................7 5 V DIGITAL CHARACTERISTICS ....................................................................8 3 V DIGITAL CHARACTERISTICS ....................................................................8 DYNAMIC CHARACTERISTICS ........................................................................9 ABSOLUTE MAXIMUM RATINGS .....................................................................9 SWITCHING CHARACTERISTICS ..................................................................10 2. GENERAL DESCRIPTION .......................................................................................12 2.1. Analog Input ....................................................................................................12 2.1.1. Analog Input Span ................................................................................... 13 2.1.2. Multiplexed Settling Limitations ............................................................13 2.1.3. Voltage Noise Density Performance .....................................................13 2.1.4. No Offset DAC ......................................................................................14 2.2. Overview of ADC Register Structure and Operating Modes ............................14 2.2.1. System Initialization ..............................................................................15 2.2.2. Serial Port Interface ..............................................................................22 2.2.3. Reading/Writing On-Chip Registers ......................................................23 2.3. Configuration Register .....................................................................................23 2.3.1. Power Consumption .............................................................................23 2.3.2. System Reset Sequence ......................................................................23 2.3.3. Input Short ............................................................................................24 2.3.4. Guard Signal .........................................................................................24 2.3.5. Voltage Reference Select .....................................................................24 2.3.6. Output Latch Pins .................................................................................24 2.3.7. Offset and Gain Select ..........................................................................25 2.3.8. Filter Rate Select ..................................................................................25 2.4. Setting up the CSRs for a Measurement .........................................................27 2.5. Calibration ........................................................................................................30 2.5.1. Calibration Registers ............................................................................30 2.5.2. Performing Calibrations ........................................................................31 2.5.3. Self Calibration .....................................................................................31 2.5.4. System Calibration ................................................................................32 2.5.5. Calibration Tips .....................................................................................32 2.5.6. Limitations in Calibration Range ...........................................................33 2.6. Performing Conversions ..................................................................................33 2.6.1. Single Conversion Mode .......................................................................33 2.6.2. Continuous Conversion Mode ..............................................................34 2.6.3. Examples of Using CSRs to Perform Conversions and Calibrations ....35 2.7. Using Multiple ADCs Synchronously ...............................................................36 2.8. Conversion Output Coding ..............................................................................36 2.9. Digital Filter ......................................................................................................38 2.10. Clock Generator ...............................................................................................39 2.11. Power Supply Arrangements ...........................................................................39 2.12. Getting Started ................................................................................................43 2.13. PCB Layout .....................................................................................................43 3. PIN DESCRIPTIONS ...............................................................................................44 4. SPECIFICATION DEFINITIONS ...............................................................................46 5. ORDERING INFORMATION .....................................................................................47 6. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION ..............47 7. PACKAGE DRAWINGS ...........................................................................................48 2 DS755F5