WM8253 w Single Channel 16-bit CIS/CCD AFE with 4-bit Wide Output DESCRIPTION FEATURES 16-bit ADC The WM8253 is a 16-bit analogue front end/digitiser IC which processes and digitises the analogue output signals 6MSPS conversion rate from CCD sensors or Contact Image Sensors (CIS) at pixel Low power - 132mW typical sample rates of up to 6MSPS. 3.3V single supply or 3.3V/2.5V dual supply operation The device includes a complete signal processing channel Single channel operation containing Reset Level Clamping, Correlated Double Correlated double sampling Sampling, Programmable Gain and Offset adjust functions. Programmable gain (8-bit resolution) Internal multiplexers allow fast switching of offset and gain Programmable offset adjust (8-bit resolution) for line-by-line colour processing. The output from this Programmable clamp voltage channel is time multiplexed into a high-speed 16-bit Analogue to Digital Converter. The digital output data is 4-bit wide multiplexed data output format available in 4-bit wide multiplexed format. Internally generated voltage references 20-lead SSOP package An internal 4-bit DAC is supplied for internal reference level generation. This may be used during CDS to reference CIS Serial control interface signals or during Reset Level Clamping to clamp CCD signals. An external reference level may also be supplied. APPLICATIONS ADC references are generated internally, ensuring optimum Flatbed and sheetfeed scanners performance from the device. USB compatible scanners The device uses an analogue supply voltage of 3.3V and a Multi-function peripherals digital interface supply of between 2.5V and 3.3V. The High-performance CCD sensor interface WM8253 typically only consumes 132mW when operating from a single 3.3V supply. BLOCK DIAGRAM VSMP MCLK AVDD DVDD1 DVDD2 VRT VRB VREF/BIAS TIMING GENERATION AND CONTROL CL R V S S WM8253 OP 0 DATA 16-BIT VINP OP 1 RLC CDS + PGA + I/O ADC OP 2 PORT OP 3 /SDO 8 I/P SIGNAL OFFSET POLARITY DAC ADJUST 4 RLC 8 VRLC/VBIAS DAC MUX MUX CONFIGURABLE RG B RG B SDI SERIAL SCK CONTROL INTERFACE SEN DGND AGND1 AGND2 WOLFSON MICROELECTRONICS plc Production Data, August 2011, Rev 4.1 To receive regular email updates, sign up at WM8253 Production Data TABLE OF CONTENTS DESCRIPTION ....................................................................................................... 1 FEATURES ............................................................................................................ 1 APPLICATIONS ..................................................................................................... 1 BLOCK DIAGRAM ................................................................................................ 1 PIN CONFIGURATION .......................................................................................... 3 ORDERING INFORMATION .................................................................................. 3 PIN DESCRIPTION ................................................................................................ 4 ABSOLUTE MAXIMUM RATINGS ........................................................................ 5 RECOMMENDED OPERATING CONDITIONS ..................................................... 5 ELECTRICAL CHARACTERISTICS ..................................................................... 6 INPUT VIDEO SAMPLING .............................................................................................. 8 OUTPUT DATA TIMING .................................................................................................. 8 SERIAL INTERFACE ....................................................................................................... 9 DEVICE DESCRIPTION ...................................................................................... 10 INTRODUCTION ........................................................................................................... 10 INPUT SAMPLING ........................................................................................................ 10 RESET LEVEL CLAMPING (RLC) ................................................................................ 10 CDS/NON-CDS PROCESSING ..................................................................................... 12 OFFSET ADJUST AND PROGRAMMABLE GAIN ........................................................ 12 ADC INPUT BLACK LEVEL ADJUST............................................................................ 13 OVERALL SIGNAL FLOW SUMMARY ......................................................................... 13 CALCULATING OUTPUT FOR ANY GIVEN INPUT ..................................................... 14 OUTPUT DATA FORMAT ............................................................................................. 15 CONTROL INTERFACE ................................................................................................ 16 TIMING REQUIREMENTS ............................................................................................ 16 PROGRAMMABLE VSMP DETECT CIRCUIT .............................................................. 17 REFERENCES .............................................................................................................. 18 POWER SUPPLY .......................................................................................................... 18 POWER MANAGEMENT............................................................................................... 18 OPERATING MODES ................................................................................................... 18 OPERATING MODE TIMING DIAGRAMS .................................................................... 19 DEVICE CONFIGURATION ................................................................................. 21 REGISTER MAP ............................................................................................................ 21 REGISTER MAP DESCRIPTION .................................................................................. 22 RECOMMENDED EXTERNAL COMPONENTS .................................................. 24 PACKAGE DIMENSIONS .................................................................................... 25 IMPORTANT NOTICE ......................................................................................... 26 ADDRESS: .................................................................................................................... 26 REVISION HISTORY ........................................................................................... 27 PD, Rev 4.1, August 2011 w 2