WM8510 w Mono CODEC with Speaker Driver DESCRIPTION FEATURES Mono Codec: The WM8510 is a low power, high quality mono codec designed Audio sample rates:8, 11.025, 16, 22.05, 24, 32, 44.1, for Voice over Internet Protocol (VoIP) and Digital Telephones. 48kHz The device integrates support for one pseudo-differential and DAC SNR 93dB, THD -84dB (A-weighted 8 48kHz) one single ended input (Handset Mic and Speaker Mic) and ADC SNR 90dB, THD -80dB (A-weighted 8 48kHz) includes drivers for speakers or headset, and mono line output, On-chip Headphone/Speaker Driver with cap-less connect making it ideal for Telephone designs. External component - 40mW output power into 16 / 3.3V SPKVDD requirements are reduced as no separate microphone or - BTL speaker drive 0.8W into 8 / 5V SPKVDD earpiece amplifiers are required. Earpiece Line output Multiple analog inputs, plus analog bypass path (0 or -10dB) Advanced Sigma Delta Converters are used along with digital Mic Preamps: decimation and interpolation filters to give high quality audio at Two Microphone Interfaces sample rates from 8 to 48kHz. - One pseudo-differential input with common mode rejection Additional digital filtering options are available in the ADC path, to cater for application filtering such as wind noise reduction, - One single ended input plus an advanced mixed signal ALC function with noise gate is - Programmable preamp gain provided. - Programmable ALC / Noise Gate in ADC path Low-noise bias supplied for microphone An on-chip PLL is provided to generate the required Master Clock from an external reference clock. The PLL clock can also Other Features be output if required elsewhere in the system. Digital Playback Limiter Programmable ADC High Pass Filter (wind noise reduction) The WM8510 operates at supply voltages from 2.5 to 3.6V, Programmable ADC Notch Filter although the digital supplies can operate at voltages down to On-chip PLL 1.71V to save power. The speaker and mono outputs use a Low power, low voltage separate supply of up to 5V which enables increased output - 2.5V to 3.6V (digital supplies: 1.71V to 3.6V) power if required. Different sections of the chip can also be - power consumption <10mW all-on 48kHz mode powered down under software control by way of the selectable 28 lead SSOP package two or three wire control interface. WM8510 is supplied in a convenient 28-lead SSOP package, APPLICATIONS offering high levels of functionality in an easy to use package. VoIP Telephones Digital Telephones Conference Speaker-phone Mobile Telephone Hands-free Kits BLOCK DIAGRAM General Purpose low power audio CODEC 20k MIC2 2 I S or PCM W 20k INTERFACE WM8510 ADC DAC Gains DIGITAL DIGITAL : -12dB to NOISY +35.25dB FILTERS FILTERS GND MICN Volume Volume ADC MONO OUT DAC Limiter / Digital Mic ALC Limiter IP PGA IP BOOST/MIX MICP Wind Noise Filters -10dB or +0dB Rbias SPKOUTP SIDETONE -1 L - (-R) -10dB or +0dB = L+R SPKOUTN CONTROL MICBIAS SPKR PGA PLL 25k 25k INTERFACE 4k 5k 250k 250k WOLFSON MICROELECTRONICS plc Production Data, September 2008, Rev 4.5 To receive regular email updates, sign up at WM8510 Production Data TABLE OF CONTENTS DESCRIPTION .......................................................................................................1 BLOCK DIAGRAM .................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TERMINOLOGY............................................................................................................ 8 SIGNAL TIMING REQUIREMENTS.......................................................................9 SYSTEM CLOCK TIMING ............................................................................................. 9 AUDIO INTERFACE TIMING MASTER MODE .......................................................... 9 AUDIO INTERFACE TIMING SLAVE MODE............................................................ 10 CONTROL INTERFACE TIMING 3-WIRE MODE .................................................... 11 CONTROL INTERFACE TIMING 2-WIRE MODE .................................................... 12 DEVICE DESCRIPTION.......................................................................................13 INTRODUCTION......................................................................................................... 13 INPUT SIGNAL PATH ................................................................................................. 14 ANALOGUE TO DIGITAL CONVERTER (ADC).......................................................... 19 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) .......................................... 23 OUTPUT SIGNAL PATH ............................................................................................. 36 ANALOGUE OUTPUTS............................................................................................... 41 OUTPUT SWITCH ...................................................................................................... 46 DIGITAL AUDIO INTERFACES................................................................................... 48 AUDIO SAMPLE RATES............................................................................................. 53 MASTER CLOCK AND PHASE LOCKED LOOP (PLL)............................................... 54 GENERAL PURPOSE INPUT/OUTPUT...................................................................... 56 CONTROL INTERFACE.............................................................................................. 56 RESETTING THE CHIP .............................................................................................. 57 POWER SUPPLIES .................................................................................................... 58 POWER MANAGEMENT ............................................................................................ 61 REGISTER MAP...................................................................................................64 REGISTER BITS BY ADDRESS ................................................................................. 65 DIGITAL FILTER CHARACTERISTICS ...............................................................76 TERMINOLOGY.......................................................................................................... 76 DAC FILTER RESPONSES......................................................................................... 77 ADC FILTER RESPONSES......................................................................................... 77 DE-EMPHASIS FILTER RESPONSES........................................................................ 78 HIGHPASS FILTER..................................................................................................... 79 APPLICATIONS INFORMATION .........................................................................80 RECOMMENDED EXTERNAL COMPONENTS.......................................................... 80 IMPORTANT NOTICE ..........................................................................................82 ADDRESS ................................................................................................................... 82 PD, Rev 4.5 ,September 2008 w 2