WM8758CBGEFLV Cirrus Logic

WM8758B w Stereo CODEC with Headphone Driver and Line Out DESCRIPTION FEATURES Stereo CODEC: The WM8758B is a low power, high quality stereo CODEC DAC SNR 100dB, THD -86dB (A weighted 48kHz) designed for portable applications such as MP3 audio player. ADC SNR 92.5dB, THD -75dB (A weighted 48kHz) The device integrates preamps for stereo differential mics, and Headphone Driver drivers for headphone and differential or stereo line output. 40mW per channel output power into 16 / 3.3V AVDD2 External component requirements are reduced as no separate Line output microphone or headphone amplifiers are required. Headphone Mic Preamps: and line common feedback improves crosstalk and noise Stereo Differential or mono microphone Interfaces performance. Programmable preamp gain Psuedo differential inputs with common mode rejection Advanced on-chip digital signal processing includes a 5-band Programmable ALC / Noise Gate in ADC path equaliser, a mixed signal Automatic Level Control for the Low-noise bias supplied for electret microphones microphone or line input through the ADC as well as a purely Other Features: digital limiter function for record or playback. Additional digital Enhanced 3-D function for improved stereo separation filtering options are available in the ADC path, to cater for Digital playback limiter application filtering such as wind noise reduction and notch 5-band Equaliser (record or playback) filter. Programmable ADC High Pass Filter (wind noise reduction) The WM8758B digital audio interface can operate in master or Programmable ADC Notch Filter slave mode with an integrated PLL. PLL supporting various clocks between 8MHz-50MHz Sample rates supported (kHz): 8, 11.025, 12, 16, 22.05, 24, The WM8758B operates at analogue supply voltages from 2.5V 32, 44.1, 48 to 3.3V, although the digital supply voltages can operate at Low power, low voltage voltages down to 1.71V to save power. Additional power 2.5V to 3.6V analogue supplies management control enables individual sections of the chip to 1.71V to 3.6V digital supplies be powered down under software control. 5x5mm 32-lead QFN package APPLICATIONS BLOCK DIAGRAM Portable audio player Production Data, January 2012, Rev 4.4 WOLFSON MICROELECTRONICS plc Copyright 2012 Wolfson Microelectronics plc To receive regular email updates, sign up at WM8758B Production Data TABLE OF CONTENTS DESCRIPTION ....................................................................................................... 1 BLOCK DIAGRAM ................................................................................................ 1 FEATURES ............................................................................................................ 1 APPLICATIONS ..................................................................................................... 1 TABLE OF CONTENTS ......................................................................................... 2 PIN CONFIGURATION .......................................................................................... 4 ORDERING INFORMATION .................................................................................. 4 PIN DESCRIPTION ................................................................................................ 5 RECOMMENDED OPERATING CONDITIONS ..................................................... 6 ELECTRICAL CHARACTERISTICS ..................................................................... 7 TERMINOLOGY ............................................................................................................ 12 HEADPHONE OUTPUT PERFORMANCE .......................................................... 13 POWER CONSUMPTION .................................................................................... 14 AUDIO PATHS OVERVIEW ................................................................................ 15 SIGNAL TIMING REQUIREMENTS .................................................................... 16 SYSTEM CLOCK TIMING ............................................................................................. 16 AUDIO INTERFACE TIMING MASTER MODE .......................................................... 16 AUDIO INTERFACE TIMING SLAVE MODE ............................................................. 17 CONTROL INTERFACE TIMING 3-WIRE MODE ...................................................... 18 CONTROL INTERFACE TIMING 2-WIRE MODE ...................................................... 19 INTERNAL POWER ON RESET CIRCUIT .......................................................... 20 RECOMMENDED POWER UP/DOWN SEQUENCE .................................................... 22 DEVICE DESCRIPTION ...................................................................................... 25 INTRODUCTION ........................................................................................................... 25 INPUT SIGNAL PATH ................................................................................................... 26 ANALOGUE TO DIGITAL CONVERTER (ADC) ........................................................... 33 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) ............................................ 37 OUTPUT SIGNAL PATH ............................................................................................... 42 3D STEREO ENHANCEMENT ...................................................................................... 49 ANALOGUE OUTPUTS ................................................................................................. 49 DIGITAL AUDIO INTERFACES ..................................................................................... 61 AUDIO SAMPLE RATES ............................................................................................... 68 MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ................................................ 68 GENERAL PURPOSE INPUT/OUTPUT ........................................................................ 70 OUTPUT SWITCHING (JACK DETECT)....................................................................... 72 CONTROL INTERFACE ................................................................................................ 73 RESETTING THE CHIP ................................................................................................ 74 POWER SUPPLIES ....................................................................................................... 75 POWER MANAGEMENT .............................................................................................. 75 POP MINIMISATION ..................................................................................................... 77 REGISTER MAP .................................................................................................. 78 DIGITAL FILTER CHARACTERISTICS .............................................................. 80 TERMINOLOGY ............................................................................................................ 80 DAC FILTER RESPONSES .......................................................................................... 81 ADC FILTER RESPONSES .......................................................................................... 81 HIGHPASS FILTER ....................................................................................................... 82 5-BAND EQUALISER .................................................................................................... 83 PD, Rev 4.4, January 2012 w 2