WM8944B
Mono Low-Power CODEC with Video Buffer
DESCRIPTION FEATURES
Hi-fi audio CODEC
The WM8944B is a highly integrated low power hi-fi CODEC
- 94dB SNR during ADC recording (A weighted)
designed for portable devices such as digital still cameras.
- 96dB SNR during DAC playback (A weighted)
Up to 2 analogue inputs may be connected; a stereo digital
2 analogue audio inputs
microphone interface is also provided. Flexible output mixing
Integrated bias reference for electret microphones
options support single-ended and differential configurations,
Digital microphone interface (Stereo)
with outputs derived from the digital audio paths or from
Powerful digital mixing / DSP functions:
analogue bypass paths. Mono line output and mono BTL
- 5-notch filters
headphone/speaker drive is supported.
- 5-band equalizer (EQ)
- ReTune parametric filter
Flexible digital mixing and powerful DSP functions are
- Dynamic range control and noise gate
available. Programmable filters and other processes may be
- Low-pass/High-pass filters
applied to the ADC and DAC signal paths simultaneously. The
- Direct Form 1 (DF1) programmable digital filter
DSP functions include 5 notch filters, 5-band EQ, dynamic
- 3D stereo enhancement (for digital mic input)
range control and the ReTune feature.
Digital beep generator
The ReTune feature is a sophisticated digital filter that can Mono line output
compensate for imperfect characteristics of the housing, Mono BTL headphone/speaker output driver
loudspeaker or microphone components in an application. I2S digital audio interface - sample rates 8kHz to 48kHz
The ReTune algorithm can provide acoustic equalisation and Frequency Locked Loop (FLL) frequency conversion / filter
selective phase (delay) control of specific frequency bands. Video buffer function
Integrated LDO low-noise voltage regulator
The WM8944B is controlled via a I2C or SPI interface.
25-ball W-CSP package (2.41 x 2.41 x 0.55mm, 0.5mm pitch)
Additional functions include Digital beep generator, Video
buffer, programmable GPIO functions, Frequency Locked
APPLICATIONS
Loop (FLL) for flexible clocking support and integrated LDO
for low noise supply regulation. Digital Still Cameras (DSC)
Multimedia phones
The WM8944B is supplied in 25-ball W-CSP package, ideal
for portable systems.
DCVDD DBVDD SPKVDD VBIN VBREFR VBOUT
WM8944B
CURRENT MODE
VIDEO BUFFER
AUX
LINEOUT
Analogue Mic
IN1/DMICDAT ADC L DAC L
Mux / PGA
DSP Core
OUTPUT
-1
(L/HPF, 3D SPKOUTP
MIXERS
ADC /
Surround, DAC
Record
5-notch filter, Digital
Digital
Re-Tune EQ, Filters
DMICDAT Filters
Dynamic Range
SPKOUTN
Digital Mic
Control)
DMICCLK Interface
(GPIO)
Digital Beep
Generator
DIGITAL AUDIO CONTROL
FLL GPIO
INTERFACE INTERFACE
MICBIAS Reference LDO
Rev 4.3
Copyright Cirrus Logic, Inc., 2010 2016
NOV 16
WM8944B
TABLE OF CONTENTS
DESCRIPTION ................................................................................................................ 1
FEATURES ..................................................................................................................... 1
APPLICATIONS .............................................................................................................. 1
TABLE OF CONTENTS .................................................................................................. 2
BLOCK DIAGRAM ......................................................................................................... 5
PIN CONFIGURATION ................................................................................................... 6
ORDERING INFORMATION ........................................................................................... 6
PIN DESCRIPTION ......................................................................................................... 7
ABSOLUTE MAXIMUM RATINGS ................................................................................. 8
RECOMMENDED OPERATING CONDITIONS .............................................................. 8
THERMAL PERFORMANCE .......................................................................................... 9
ELECTRICAL CHARACTERISTICS ............................................................................ 10
TERMINOLOGY ....................................................................................................................... 13
TYPICAL PERFORMANCE .......................................................................................... 14
TYPICAL POWER CONSUMPTION ........................................................................................ 15
AUDIO SIGNAL PATHS DIAGRAM ............................................................................. 16
SIGNAL TIMING REQUIREMENTS ............................................................................. 17
SYSTEM CLOCK TIMING ........................................................................................................ 17
AUDIO INTERFACE TIMING ................................................................................................... 17
MASTER MODE ............................................................................................................................................................................ 17
SLAVE MODE ................................................................................................................................................................................ 18
CONTROL INTERFACE TIMING ............................................................................................. 19
DEVICE DESCRIPTION ............................................................................................... 21
INTRODUCTION ...................................................................................................................... 21
ANALOGUE INPUT SIGNAL PATH ......................................................................................... 22
INPUT PGA ENABLE .................................................................................................................................................................... 22
INPUT PGA CONFIGURATION .................................................................................................................................................... 23
MICROPHONE BIAS CONTROL .................................................................................................................................................. 23
INPUT PGA GAIN CONTROL ....................................................................................................................................................... 24
DIGITAL MICROPHONE INTERFACE .................................................................................... 26
ANALOGUE-TO-DIGITAL CONVERTER (ADC) ...................................................................... 27
ADC VOLUME CONTROL ............................................................................................................................................................. 28
ADC HIGH PASS FILTER ............................................................................................................................................................. 30
DSP CORE ............................................................................................................................... 31
DSP CONFIGURATION MODES .................................................................................................................................................. 31
LOW-PASS / HIGH-PASS FILTER (LPF/HPF) .............................................................................................................................. 32
3D SURROUND ............................................................................................................................................................................. 33
5-NOTCH FILTER .......................................................................................................................................................................... 34
DF1 FILTER ................................................................................................................................................................................... 35
HPF ................................................................................................................................................................................................ 35
RETUNE FILTER ........................................................................................................................................................................... 36
5-BAND EQ .................................................................................................................................................................................... 36
DYNAMIC RANGE CONTROL (DRC) ........................................................................................................................................... 37
SIGNAL ENHANCEMENT REGISTER CONTROLS ..................................................................................................................... 37
DYNAMIC RANGE CONTROL (DRC) ..................................................................................... 38
DRC COMPRESSION / EXPANSION / LIMITING ......................................................................................................................... 39
GAIN LIMITS .................................................................................................................................................................................. 43
GAIN READBACK ......................................................................................................................................................................... 44
DYNAMIC CHARACTERISTICS ................................................................................................................................................... 45
ANTI-CLIP CONTROL ................................................................................................................................................................... 46
2 Rev 4.3