WM8976 w Stereo CODEC with Speaker Driver DESCRIPTION FEATURES Stereo CODEC: The WM8976 is a low power, high quality CODEC designed DAC SNR 98dB, THD -84dB (A weighted 48kHz) for portable applications such as multimedia phone, digital ADC SNR 95dB, THD -84dB (A weighted 48kHz) still camera or digital camcorder. On-chip Headphone Driver with capless option The device integrates a preamp for differential microphone, - 40mW per channel into 16 / 3.3V SPKVDD and includes drivers for speakers, headphone and 1W output power into 8 BTL speaker / 5V SPKVDD differential or stereo line output. External component - Capable of driving piezo speakers requirements are reduced as no separate microphone or - Stereo speaker drive configuration headphone amplifiers are required. Mic Preamps: Differential or single-ended microphone interfaces Advanced on-chip digital signal processing includes a 5- - Programmable preamp gain band equaliser, a mixed signal Automatic Level Control for - Pseudo differential input with common mode rejection the microphone or line input through the ADC as well as a - Programmable ALC / Noise Gate in ADC path purely digital limiter function for record or playback. Low-noise bias supplied for electret microphone Additional digital filtering options are available in the ADC Other Features: path, to cater for application filtering such as wind noise Enhanced 3-D function for improved stereo separation reduction. Digital playback limiter The WM8976 digital audio interface can operate as a master 5-band Equaliser (record or playback) or a slave. An internal PLL can generate all required audio Programmable ADC High Pass Filter (wind noise reduction) clocks for the CODEC from common reference clock Programmable ADC Notch Filter frequencies, such as 12MHz and 13MHz. Aux inputs for stereo analogue input signals or beep On-chip PLL supporting 12, 13, 19.2MHz and other clocks The WM8976 operates at analogue supply voltages from Support for 8, 11.025, 12, 16, 22.05, 24, 32, 44.1 and 48kHz 2.5V to 3.3V, although the digital core can operate at sample rates voltages down to 1.71V to save power. The speaker outputs Low power, low voltage and OUT3/4 line outputs can run from a 5V supply if - 2.5V to 3.6V (digital: 1.71V to 3.6V) increased output power is required. Individual sections of 5x5mm 32-lead QFN package the chip can also be powered down under software control. APPLICATIONS Stereo Camcorder or DSC Multimedia Phone WOLFSON MICROELECTRONICS plc Production Data, November 2011, Rev 4.5 To receive regular email updates, sign up at WM8976 Production Data TABLE OF CONTENTS TABLE OF CONTENTS ......................................................................................... 2 PIN CONFIGURATION .......................................................................................... 4 ORDERING INFORMATION .................................................................................. 4 PIN DESCRIPTION ................................................................................................ 5 ABSOLUTE MAXIMUM RATINGS ........................................................................ 6 RECOMMENDED OPERATING CONDITIONS ..................................................... 6 ELECTRICAL CHARACTERISTICS ..................................................................... 7 TERMINOLOGY .............................................................................................................. 9 SPEAKER OUTPUT THD VERSUS POWER ...................................................... 10 POWER CONSUMPTION .................................................................................... 11 AUDIO PATHS OVERVIEW ................................................................................ 13 SIGNAL TIMING REQUIREMENTS .................................................................... 14 SYSTEM CLOCK TIMING ............................................................................................. 14 AUDIO INTERFACE TIMING MASTER MODE .......................................................... 14 AUDIO INTERFACE TIMING SLAVE MODE ............................................................. 15 CONTROL INTERFACE TIMING 3-WIRE MODE ...................................................... 16 CONTROL INTERFACE TIMING 2-WIRE MODE ...................................................... 17 INTERNAL POWER ON RESET CIRCUIT .......................................................... 18 DEVICE DESCRIPTION ...................................................................................... 20 INTRODUCTION ........................................................................................................... 20 INPUT SIGNAL PATH ................................................................................................... 22 ANALOGUE TO DIGITAL CONVERTER (ADC) ........................................................... 28 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) ............................................ 32 OUTPUT SIGNAL PATH ............................................................................................... 44 3D STEREO ENHANCEMENT ...................................................................................... 51 ANALOGUE OUTPUTS ................................................................................................. 51 DIGITAL AUDIO INTERFACES ..................................................................................... 66 AUDIO SAMPLE RATES ............................................................................................... 71 MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ................................................ 71 COMPANDING .............................................................................................................. 73 GENERAL PURPOSE INPUT/OUTPUT ........................................................................ 75 OUTPUT SWITCHING (JACK DETECT)....................................................................... 76 CONTROL INTERFACE ................................................................................................ 77 RESETTING THE CHIP ................................................................................................ 78 POWER SUPPLIES ....................................................................................................... 79 RECOMMENDED POWER UP/DOWN SEQUENCE .................................................... 80 POWER MANAGEMENT .............................................................................................. 84 REGISTER MAP .................................................................................................. 85 REGISTER BITS BY ADDRESS ................................................................................... 87 DIGITAL FILTER CHARACTERISTICS ............................................................ 103 TERMINOLOGY .......................................................................................................... 103 DAC FILTER RESPONSES ........................................................................................ 104 ADC FILTER RESPONSES ........................................................................................ 104 HIGHPASS FILTER ..................................................................................................... 105 5-BAND EQUALISER .................................................................................................. 106 PD, Rev 4.5, November 2011 w 2