WM9713L w AC97 Audio + Touchpanel CODEC DESCRIPTION FEATURES AC97 Rev 2.2 compatible stereo CODEC The WM9713L is a highly integrated input/output device - DAC SNR 94dB, THD 85dB designed for mobile computing and communications. - ADC SNR 87dB, THD 86dB The chip is architected for dual CODEC operation, supporting - Variable Rate Audio, supports all WinCE sample rates hi-fi stereo CODEC functions via the AC link interface, and - Tone Control, Bass Boost and 3D Enhancement additionally supporting voice CODEC functions via a PCM type On-chip 45mW headphone driver Synchronous Serial Port (SSP). A third, auxiliary DAC is On-chip 400mW mono or stereo speaker drivers provided which may be used to support generation of Stereo, mono or differential microphone input supervisory tones, or ring-tones at different sample rates to the - Automatic Level Control (ALC) main CODEC. - Mic insert and mic button press detection Auxiliary mono DAC (ring tone or DC level generation) The device can connect directly to a 4-wire or 5-wire touch- Seamless interface to wireless chipset panel, mono or stereo microphones, stereo headphones and a Resistive touchpanel interface stereo speaker, reducing total component count in the system. - Supports 4-wire and 5-wire panels Cap-less connections to the headphones, speakers, and - 12-bit resolution, INL 2 LSBs (<0.5 pixels) earpiece may be used, saving cost and board area. Additionally, - X, Y and touch-pressure (Z) measurement multiple analogue input and output pins are provided for - Pen-down detection supported in Sleep Mode seamless integration with analogue connected wireless 2 Additional PCM/I S interface to support voice CODEC communication devices. PLL derived audio clocks. All device functions are accessed and controlled through a Supports input clock ranging from 2.048MHz to 78.6MHz single AC-Link interface compliant with the AC97 standard. The 1.8V to 3.6V supplies (digital down to 1.62V, speaker up to 24.576MHz masterclock can be input directly or generated 4.2V) internally from a 13MHz (or other frequency) clock by an on-chip 7x7mm 48-lead QFN package PLL. The PLL supports a wide range of input clock from APPLICATIONS 2.048MHz to 78.6MHz. The WM9713L operates at supply voltages from 1.8V to 3.6V. Smartphones Each section of the chip can be powered down under software Personal Digital Assistants (PDA) control to save power. The device is available in a small Handheld and Tablet Computers leadless 7x7mm QFN package, ideal for use in hand-held portable systems. BLOCK DIAGRAM WOLFSON MICROELECTRONICS plc Pre-Production, November 2011, Rev 3.3 To receive regular email updates, sign up at WM9713L Pre-Production TABLE OF CONTENTS DESCRIPTION ....................................................................................................... 1 FEATURES ............................................................................................................ 1 APPLICATIONS ..................................................................................................... 1 BLOCK DIAGRAM ................................................................................................ 1 TABLE OF CONTENTS ......................................................................................... 2 PIN CONFIGURATION .......................................................................................... 4 ORDERING INFORMATION .................................................................................. 4 PIN DESCRIPTION ................................................................................................ 5 ABSOLUTE MAXIMUM RATINGS ........................................................................ 6 RECOMMENDED OPERATING CONDITIONS ..................................................... 7 ELECTRICAL CHARACTERISTICS ..................................................................... 8 AUDIO OUTPUTS ............................................................................................................ 8 AUDIO INPUTS ................................................................................................................ 9 AUXILIARY MONO DAC (AUXDAC) ................................................................................ 9 PCM VOICE DAC (VXDAC) ............................................................................................. 9 TOUCHPANEL AND AUXILIARY ADC .......................................................................... 10 COMPARATORS ........................................................................................................... 10 REFERENCE VOLTAGES ............................................................................................. 10 DIGITAL INTERFACE CHARACTERISTICS ................................................................. 11 POWER CONSUMPTION .................................................................................... 11 SIGNAL TIMING REQUIREMENTS .................................................................... 12 AC97 INTERFACE TIMING............................................................................................ 12 PCM AUDIO INTERFACE TIMING SLAVE MODE ..................................................... 16 PCM AUDIO INTERFACE TIMING MASTER MODE ................................................. 17 DEVICE DESCRIPTION ...................................................................................... 18 INTRODUCTION ............................................................................................................ 18 AUDIO PATHS OVERVIEW ........................................................................................... 20 CLOCK GENERATION .................................................................................................. 21 CLOCK DIVISION MODES ............................................................................................ 21 PLL MODE ..................................................................................................................... 24 DIGITAL INTERFACES .................................................................................................. 27 AC97 INTERFACE ......................................................................................................... 27 PCM INTERFACE .......................................................................................................... 28 AUDIO ADCS ...................................................................................................... 33 STEREO ADC ................................................................................................................ 33 RECORD SELECTOR.................................................................................................... 34 RECORD GAIN .............................................................................................................. 35 AUTOMATIC LEVEL CONTROL .................................................................................... 37 AUDIO DACS ...................................................................................................... 40 STEREO DAC ................................................................................................................ 40 VOICE DAC .................................................................................................................... 43 AUXILIARY DAC ............................................................................................................ 44 VARIABLE RATE AUDIO / SAMPLE RATE CONVERSION .............................. 46 AUDIO INPUTS.................................................................................................... 47 LINE INPUT .................................................................................................................... 47 MICROPHONE INPUT ................................................................................................... 48 MONOIN INPUT ............................................................................................................. 54 PCBEEP INPUT ............................................................................................................. 56 DIFFERENTIAL MONO INPUT ...................................................................................... 56 PP, Rev 3.3, November 2011 w 2