CMX655DQ6-REEL CML Microcircuits

CMX655D Ultra Low Power Voice Codec D/655/5 October 2020 Provisional Features Applications Digital microphone support Security alarm panels High efficiency Class-D amplifier Glass break detection Ultra Low power consumption Intercom and access systems 16 bit audio data Mobile radio and accessories Supports conventional telephony and HD voice (300Hz - 3.4kHz Wired telephony and 50Hz -7kHz bandwidths) Voice controlled equipment Supports audio bandwidths up to 21kHz Supports 8/16/32/48 ksps sample rates Flexible serial audio interface 1 SPI /TWI control interface Small 24-lead VQFN Package PDM to PLL and Signal RCLK decimated Filtering internal osc processing 16 bit PCM LRCLK/FS I2S/PCM audio BCLK interface DO DI Control registers and logic Digital sidetone Optional second microphone Optional second microphone CSN/A0 SPI/TWI control MISOSDA Line out interface SCLK/SCL MOSI/A1 RSTN IRQN Class D Digital gain Filtering driver control VSS Supplies VDD Figure 1 CMX655D Simplified Block Diagram 1 Brief Description Traditionally audio codecs have interfaced to electret microphones and speakers providing A-to-D and D-to-A functions using precision oversampling data converters. Recent advances in microphone design using MEMS techniques are now changing this, along with higher efficiency speaker drivers such as Class-D topologies. Both of these advances enable significant reductions in power consumption which is needed to address new applications such as voice control, that require always-on operation. Such applications are often battery powered, driving the need for minimal power consumption. The CMX655D addresses these needs providing an update to the traditional audio codec that is both very low power and small in size. The CMX655D has a digital microphone interface that connects single or dual microphones to the device and the same parallel processing streams. A 1-Watt mono Class-D amplifier drives differential audio outputs for a filterless speaker. A separate single-ended analogue lineout is also provided for a headphone. The Class-D amplifier features programmable filtering and digital gain control. This architecture operates with far higher efficiency than conventional speaker drivers. The device interfaces via standard serial busses that are commonly found on many microcontrollers, DSPs and low cost radio transceivers. 1 SPI is a trademark of Motorola Inc. 2020 CML Microsystems Plc Digital InterfaceUltra-Low Power Voice Codec CMX655D Contents Section Page 1 Brief Description ....................................................................................................................................................... 1 2 Block Diagram .......................................................................................................................................................... 5 2.1 CMX655D ........................................................................................................................................................................... 5 3 Pin List ...................................................................................................................................................................... 6 3.1 CMX655D ........................................................................................................................................................................... 6 4 External Components ............................................................................................................................................... 9 4.1 CMX655D ........................................................................................................................................................................... 9 4.1.1 Power Supply and Pin Decoupling ..................................................................................................................................... 9 4.1.2 SPI .................................................................................................................................................................................... 10 4.1.3 TWI .................................................................................................................................................................................. 11 4.1.4 Speaker and Microphone ................................................................................................................................................ 12 5 General Description ................................................................................................................................................ 13 5.1 Power Management ........................................................................................................................................................ 13 5.1.1 External Supplies ............................................................................................................................................................. 13 5.1.2 Regulated Supplies .......................................................................................................................................................... 13 5.2 Device Reset .................................................................................................................................................................... 13 5.2.1 Power-On-Reset .............................................................................................................................................................. 13 5.2.2 Reset Pin .......................................................................................................................................................................... 13 5.3 Main Clock ....................................................................................................................................................................... 14 5.3.1 Clock Frequency .............................................................................................................................................................. 14 5.3.2 Clock Generation ............................................................................................................................................................. 14 5.3.3 PLL ................................................................................................................................................................................... 15 5.3.4 Low Power Oscillator ....................................................................................................................................................... 16 5.3.5 Clock Control Registers .................................................................................................................................................... 16 5.4 Microphone Interface ..................................................................................................................................................... 18 5.4.1 Digital Microphone Interface .......................................................................................................................................... 18 5.5 Class-D Amplifier ............................................................................................................................................................. 18 5.5.1 Audio Outputs ................................................................................................................................................................. 18 5.5.2 Overload Current Protection ........................................................................................................................................... 18 5.5.3 Thermal Protection.......................................................................................................................................................... 18 5.5.4 Clipping Detection ........................................................................................................................................................... 18 5.6 Audio Signal Processing ................................................................................................................................................... 19 5.6.1 Record Level Control ....................................................................................................................................................... 19 5.6.2 Noise Gate ....................................................................................................................................................................... 19 5.6.3 Record Level Detection ................................................................................................................................................... 22 5.6.4 Playback Preamplifier Gain .............................................................................................................................................. 23 5.6.5 Playback Volume Control ................................................................................................................................................ 24 5.6.6 Automatic Level Control .................................................................................................................................................. 25 5.6.7 Digital Sidetone ............................................................................................................................................................... 27 5.6.8 Voice Filters ..................................................................................................................................................................... 28 5.6.9 Channel Multiplexing ...................................................................................................................................................... 30 5.6.10 Click-and-Pop Reduction ................................................................................................................................................. 30 5.7 Control Interface ............................................................................................................................................................. 31 5.7.1 SPI Slave .......................................................................................................................................................................... 31 5.7.2 TWI Slave ......................................................................................................................................................................... 32 5.8 Serial Audio Interface ...................................................................................................................................................... 35 5.8.1 I2S Mode ......................................................................................................................................................................... 35 5.8.2 Left-Justified Mode.......................................................................................................................................................... 35 5.8.3 PCM Mode ....................................................................................................................................................................... 36 5.8.4 Audio Companding .......................................................................................................................................................... 37 5.8.5 Serial Audio Interface Registers ...................................................................................................................................... 38 5.9 Interrupt Status and IRQN Pin ......................................................................................................................................... 39 5.9.1 Interrupt Registers .......................................................................................................................................................... 39 5.10 System Control ................................................................................................................................................................ 40 5.10.1 System Control Registers ................................................................................................................................................. 40 5.11 Register Address Map ..................................................................................................................................................... 41 6 Application Notes ................................................................................................................................................... 43 6.1 Programming Examples ................................................................................................................................................... 43 6.1.1 Start-up ........................................................................................................................................................................... 43 2020 CML Microsystems Plc 2 D/655/5