CMX979Q4 CML Microcircuits

CMX979 Dual PLL + VCO CMX979 RF Frac-N Synth, IF Integer-N Synth and VCOs D/979/5 December 2019 DATASHEET Provisional Features RF synthesiser/PLL -209dBc/Hz normalised phase noise Fractional-N 24-bit divider Integrated low noise LDO regulator Output range 338MHz 3.6GHz Single 2.7V to 3.6V supply Programmable output divider 1.8V digital interface supported Fast lock function -40 to +85 operating temp. range Programmable charge pump current Small outline 6mm x 6mm VQFN package IF synthesiser/PLL Applications Integer-N 14-bit divider Satellite modems Output range 31MHz 1GHz Custom ISM band modems Programmable output divider Wireless data links CATV equipment General purpose RF use LOOUT Fractional-N Divide by: PLL 1, 2, 4, 6 or 8 MCLK RF Synthesiser IFPLLOUT Integer-N Divide by: PLL 1, 4, 8 or 16 IF Synthesiser Control Registers C-BUS Power Supply 1 Brief Description The CMX979 is a low-power, wideband, dual synthesiser and VCO, supporting signal generation over a wide range of frequencies. The RF high frequency synthesiser employs a Fractional-N design and will operate at up to 3.6GHz using a fully-integrated internal VCO. The IF synthesiser employs an integer-N design and will operate at up to 1GHz. It has an integrated VCO requiring only an external inductor to set the fundamental frequency. Internal dividers and buffers are provided for each synthesiser/PLL allowing a wide range of frequency generation options. Designed primarily for radio transmitters and receivers using superhetrodyne architectures, the CMX979 provides a compact solution for frequency generation requiring a minimum of external components. The CMX979 operates from a single supply voltage and is available in a small 6x6mm VQFN package. 2019 CML Microsystems Plc DORF FLCK DOINDUAL PLL + VCO CMX979 CONTENTS Section Page 1 Brief Description ....................................................................................................................................................... 1 1.1 History ............................................................................................................................................................................... 4 2 Block Diagram .......................................................................................................................................................... 5 3 Performance Specification ........................................................................................................................................ 6 3.1 Electrical Performance ...................................................................................................................................................... 6 3.1.1 Absolute Maximum Ratings .............................................................................................................................................. 6 3.1.2 Operating Limits ................................................................................................................................................................ 6 3.1.3 Operating Characteristics .................................................................................................................................................. 7 4 Pin and Signal Definitions ....................................................................................................................................... 11 4.1 Pin List ............................................................................................................................................................................. 11 4.2 Signal Definitions ............................................................................................................................................................. 12 5 Power Supply and Decoupling ................................................................................................................................ 13 5.1 Layout Recommendations ............................................................................................................................................... 14 6 Detailed Description ............................................................................................................................................... 15 6.1 Power Management ........................................................................................................................................................ 15 6.2 Clock Generator............................................................................................................................................................... 15 6.3 RF VCO and Fractional-N PLL ........................................................................................................................................... 15 6.3.1 RF Fractional-N Synthesiser ............................................................................................................................................. 15 6.3.2 Register Loading Order .................................................................................................................................................... 16 6.3.3 Fractional-N Programming Example ................................................................................................................................ 16 6.3.4 RF VCO ............................................................................................................................................................................. 17 6.4 IF PLL and VCO ................................................................................................................................................................. 19 6.4.1 IF PLL ............................................................................................................................................................................... 19 6.4.2 IF VCO .............................................................................................................................................................................. 20 6.5 Local Oscillator (LO) ......................................................................................................................................................... 23 6.5.1 LO Output (LOOUT) ......................................................................................................................................................... 24 6.6 Status and Interrupts ....................................................................................................................................................... 25 7 Register Description and C-BUS Interface ............................................................................................................... 26 7.1 General Reset Command ................................................................................................................................................. 27 7.1.1 GEN RST - 30 ................................................................................................................................................................. 27 7.2 General Control Register ................................................................................................................................................. 27 7.2.1 GCR - 31 ......................................................................................................................................................................... 27 7.2.2 GCR RD - C1 .................................................................................................................................................................. 27 7.3 RF PLL .............................................................................................................................................................................. 28 7.3.1 RFPLL CON - 34 ............................................................................................................................................................. 28 7.3.2 RFPLL BLEED - 35 .......................................................................................................................................................... 29 7.3.3 RFPLL LOCKDET - 36...................................................................................................................................................... 29 7.3.4 RFPLL FLCK - 37 ............................................................................................................................................................. 30 7.3.5 RFPLL RDIV - 38 ............................................................................................................................................................ 31 7.3.6 RFPLL IDIV - 39 .............................................................................................................................................................. 31 7.3.7 RFPLL FDIV0 - 3A .......................................................................................................................................................... 31 7.3.8 RFPLL FDIV1 - 3B ........................................................................................................................................................... 31 7.3.9 RFPLL RDIV RD - C8 ...................................................................................................................................................... 32 7.3.10 RFPLL IDIV RD - C9 ....................................................................................................................................................... 32 7.3.11 RFPLL FDIV0 RD - CA .................................................................................................................................................... 32 7.3.12 RFPLL FDIV1 RD - CB .................................................................................................................................................... 32 7.4 IF PLL ............................................................................................................................................................................... 32 7.4.1 IFPLL NDIV - 3C ............................................................................................................................................................. 32 7.4.2 IFPLL RDIV - 3D ............................................................................................................................................................. 33 7.4.3 IFPLL CURRENT - 3E ...................................................................................................................................................... 33 7.4.4 IFPLL NDIV RD - CC ...................................................................................................................................................... 33 7.4.5 IFPLL RDIV RD - CD....................................................................................................................................................... 33 7.4.6 IFPLL CURRENT RD - CE................................................................................................................................................ 33 7.5 VCO Calibration ............................................................................................................................................................... 34 7.5.1 VCO CAL CTRL - 50 ....................................................................................................................................................... 34 7.5.2 VCO BIAS CAL WRITE - 51 ........................................................................................................................................... 34 7.5.3 VCO BIAS CAL TIME - 52 ............................................................................................................................................. 34 2019 CML Microsystems Plc 2 D/979/5