PL 3120 and PL 3150 Power Line Smart Transceivers Feature Combines an ANSI-709.2 compliant Power Line Transceiver with an ANSI 709.1 compliant Neuron 3120 or Neuron 3150 processor core Designed to comply with FCC, Industry Canada, Japan MPT, and European CENELEC EN 50065-1 power line communications regulations Supports CENELEC A-band and C-band operation Dual carrier frequency mode and digital signal processing 4K Bytes of embedded EEPROM for application code and conguration data on the PL 3120 Power Line Smart Transceiver and 0.5K Bytes of embedded EEP- ROM for conguration data on the PL 3150 Power Line Smart Transceiver Interface for external memory for applications with larger memory requirements (PL 3150 Power Line Smart Transceiver only) 2K Bytes of embedded RAM for buering network data and network variables Full duplex hardware UART and SPI serial interfaces 12 I/O pins with 38 programmable standard I/O modes to minimize external interface circuitry -40 to +85C operating temperature range Overview The PL 3120 and PL 3150 Power Line Smart Transceivers integrate a Neuron processor core with a power line transceiver, making them ideal for appliance, audio/video, lighting, heat- ing/cooling, security, metering, and irrigation applications. Essentially a system-on-a-chip, the Power Line Smart Transceivers feature a highly reliable narrow-band power line transceiver, an 8-bit Neuron processor core for running applications and managing network communica- tions, a choice of on-board or external memory, and an extremely small form factor all at a price that is compelling for even the most cost-sensitive consumer product applications. A Global Product Compliant with FCC, Industry Canada, Japan MPT, and European CENELEC EN50065-1 regulations, the PL 3120 and PL 3150 Power Line Smart Transceivers can be used in applica- tions worldwide. The Power Line Smart Transceivers implement the CENELEC access protocol, which can be enabled or disabled by the user. This eliminates the need for users to develop the complex timing and access algorithms mandated under CENELEC EN50065-1. Additionally, the Power www.echelon.com Line Smart Transceivers can operate in ei- The PL 3120 and PL 3150 Power Line Smart Line Smart Transceivers also feature a full ther the CENELEC utility (A-band) or gen- Transceivers operate at either 6.5536MHz duplex hardware UART supporting baud eral signaling (C-band) bands, eliminating or 10.0MHz. The 6.5536MHz clock fre- rates of up to 115kbps, and an SPI interface the need to stock multiple parts for quency enables the Power Line Smart that operates up to 625kbps. dierent applications. Transceiver to communicate in the CEN- ELEC A-band, which is used for metering External Components Unmatched Performance and utility applications. The 10MHz clock Only a small number of inexpensive exter- frequency supports the CENELEC C-band, Intermittent noise sources, impedance nal components are required to create a which is used for general purpose signaling changes, and attenuation make the power complete Power Line Smart Transceiver- and all non-utility related applications. line a hostile signaling environment. The PL based device (see the PL 3120 / PL 3150 Application programs stored in the embed- 3120 and PL 3150 Power Line Smart Trans- Power Line Smart Transceiver Block Dia- ded EEPROM (PL 3120 Power Line Smart ceivers incorporate a variety of technical gram). These components include: Transceiver) or in the external non-volatile innovations to insure reliable operation: Discrete interface circuitry com- memory (PL 3150 Power Line Smart Trans- Unique dual carrier frequency prised of roughly fty components, ceiver) may be updated over the power feature automatically selects an al- primarily resistors and capacitors. line network. This valuable feature enables ternate secondary communication products to be updated without physically This circuitry provides front-end frequency should the primary accessing them, i.e., from a local PC with a ltering for the on-chip A/D, and power line interface or from a remote frequency be blocked by noise implements the power amplier service center through an i.LON Internet that drives the on-chip D/A transmit Highly ecient, patented, low-over- Server. The embedded EEPROM may be signal onto the power line. Echelon head forward error correction written up to 10,000 times with no data oers a comprehensive Power Line (FEC) algorithm to overcome loss. Data stored in the EEPROM will be Development Support Kit* (DSK) errors induced by noise retained for at least ten years. with which customers can imple- Sophisticated digital signal process- ment this interface circuitry. Contact Inexpensive Power Supply ing, noise cancellation, and distor- your salesperson for details about tion correction algorithms. These The PL 3120 and PL3150 Power Line Smart purchasing a PL DSK. features correct for a wide variety Transceivers use +8.5 to +18VDC and Coupling circuit consisting of of signaling impediments, including +5VDC power supplies and support very approximately ten components, low receive mode current consumption. impulsive noise, continuous tone The wide power supply range and very mainly capacitors and inductors, noise, and phase distortion low receive power requirements allow which acts as a simple high-pass High output, low distortion external the use of inexpensive power supplies. lter located between the Power amplier design that can deliver Line Smart Transceiver and the Additionally, the Power Line Smart Trans- 1Ap-p into low impedance loads, ceivers incorporate a power management power mains. This circuitry provides eliminating the need for expensive feature that constantly monitors the status surge and line transient protection phase couplers in typical residential of the devices power supply. If during in addition to blocking the low fre- applications. transmission the power supply voltage quency, 50Hz/60Hz AC mains falls to a level that is insucient to ensure The combination of these special features signal. Detailed schematics are reliable signaling, the transceiver stops enable the Power Line Smart Transceivers provided in the PL 3120 / PL 3150 transmitting until the power supply voltage to operate reliably in the presence of con- Power Line Smart Transceiver rises to an acceptable level. This unique sumer electronics, power line intercoms, Data Book. feature allows the use of a power supply motor noise, electronic ballasts, dimmers, with one-third the current capacity other- and other typical sources of interference. The new RoHS compliant Revision wise required. The net result is a reduction The Power Line Smart Transceivers can B Power Line Smart Transceivers in the size, cost, and thermal dissipation communicate over virtually any AC or eliminate the need for an external of the power supply. Power management is DC power mains, as well as unpowered inverter, thereby reducing the cost especially useful for high volume, low-cost twisted pair, by way of a low-cost, of external components. Circuits consumer products such as electrical external coupling circuit. without an external inverter can switches, motion detectors, outlets, light The PL 3120 Power Line Smart Transceiver only be used with Revision B parts sensors, and dim is targeted at very low cost designs that (15311R-1000 PL 3120 Power Line require up to 4K Bytes of application code, Smart Transceiver and 15321R-960 Flexible I/O, Simple and an ultra-compact 38 TSSOP package. PL 3150 Power Line Smart The chip includes 4K Bytes of EEPROM and Conguration Transceiver). 2K Bytes of RAM. The Neuron system The PL 3120 and PL 3150 Power Line Smart rmware and software application libraries *Echelon Corporation has developed and Transceivers provide 12 I/O pins which can are contained in on-chip ROM. patented certain methods of implementing be congured to operate in one or more circuitry external to the PL 3120 and PL 3150 The PL 3150 Power Line Smart Transceiver of 38 predened standard input/output Power Line Smart Transceiver chips. These patents are licensed pursuant to the Echelon is intended for applications that need to modes. Combining a wide range of I/O Power Line Smart Transceiver Development address up to 58K Bytes of external mem- models with two on-board timer/counters Support Kit License Agreement. ory (16K Bytes is dedicated to the Neuron enables the PL 3120 and PL 3150 Power system rmware) using a 64 LQFP pack- Line Smart Transceivers to interface with age. The chip includes 0.5K Bytes of application circuits using minimal external EEPROM and 2K Bytes of RAM. logic or software development. The Power www.echelon.com