AT25PE20
2-Mbit DataFlash-L
Page Erase Serial Flash Memory
PRELIMINARY DATASHEET
Features
Single 1.65V - 3.6V supply
Serial Peripheral Interface (SPI) compatible
Supports SPI modes 0 and 3
Supports RapidS operation
Continuous read capability through entire array
Up to 85MHz
Low-power read option up to 15MHz
Clock-to-output time (t ) of 6ns maximum
V
User configurable page size
256 bytes per page (default)
264 bytes per page (customer selectable option)
One SRAM data buffer (256/264 bytes)
Flexible programming options
Byte/Page Program (1 to 256/264 bytes) directly into main memory
Buffer Write
Buffer to Main Memory Page Program
Single Command Page Read-Modify-Write Option
Flexible erase options
Page Erase (256/264 bytes)
Block Erase (2KB)
Sector Erase (32KB)
Chip Erase (2-Mbits)
128-byte Security Register
128 bytes factory programmed with a unique identifier
Hardware and software controlled reset options
JEDEC Standard Manufacturer and Device ID Read
Low-power dissipation
300nA Ultra-Deep Power-Down current (typical)
5A Deep Power-Down current (typical)
25 A Standby current (typical)
7mA Active Read current (typical)
Endurance: 100,000 program/erase cycles per page minimum
Data retention: 20 years
Complies with full industrial temperature range
Green (Pb/Halide-free/RoHS compliant) packaging options
8-lead SOIC (0.150 wide and 0.208" wide)
8-pad Ultra-thin DFN (5 x 6 x 0.6mm)
DS-25PE20139B3/2018Description
The Adesto AT25PE20 is a 1.65V minimum, serial-interface sequential access Flash memory is ideally suited for a wide
variety of digital voice, image, program code, and data storage applications. The AT25PE20 also supports the RapidS
serial interface for applications requiring very high speed operation. Its 2,162,688 bits of memory are organized as 1,024
pages of 256 bytes (default) or 264 bytes (customer option) each. In addition to the main memory, AT25PE20 also
2
contains one SRAM buffer of 256/264 bytes. The Buffer can be used as additional system scratch memory, and E PROM
emulation
(bit or byte alterability) can be easily handled with a self-contained three step read-modify-write operation.
Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the
Adesto DataFlash-L uses a serial interface to sequentially access its data. The simple sequential access dramatically
reduces active pin count, facilitates simplified hardware layout, increases system reliability, minimizes switching noise,
and reduces package size. The device is optimized for use in many commercial and industrial applications where
high-density, low-pin count, low-voltage, and low-power are essential.
To allow for simple in-system re-programmability, AT25PE20 does not require high input voltages for programming. The
device operates from a single 1.65V to 3.6V power supply for the erase and program and read operations. The
AT25PE20 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of the Serial Input
(SI), Serial Output (SO), and the Serial Clock (SCK).
All programming and erase cycles are self-timed.
1. Pin Configurations and Pinouts
Figure 1-1. Pinouts
8-lead SOIC 8-pad UDFN
Top View Top View
(through package)
CS 1 8 Vcc
CS 1 8 Vcc
SO 2 7
RESET
SO 2 7 RESET
WP 3 6 SCK
WP 3 6 SCK
GND 4 5
SI
GND 4 5 SI
Note: 1. The metal pad on the bottom of the UDFN package is not internally connected to a voltage potential.
This pad can be a no connect or connected to GND.
AT25PE20 2
DS-25PE20139B3/2018