SLG46170VTR Dialog Semiconductor

SLG46170 GreenPAK Programmable Mixed-signal Matrix Features Pin Configuration Logic & Mixed Signal Circuits Highly Versatile Macrocells Read Back Protection (Read Lock) 1.8V (5%) to 5V (10%) Supply 1 12 Operating Temperature Range: -40C to 85C VDD GPIO RoHS Compliant / Halogen-Free 14 13 2 11 GPI GPIO 14-pin STQFN: 2 x 2.2 x 0.55 mm, 0.4 mm pitch 3 10 GPIO GPIO Applications 49 GPIO GND Personal Computers and Servers 67 PC Peripherals 5 8 GPIO GPIO Consumer Electronics Data Communications Equipment Handheld and Portable Electronics 14-pin STQFN (Top View) Block Diagram Pin 14 Pin 13 GPIO GPIO Pin 1 Pin 12 VDD GPIO Counters/Delay Generators D Flip Flops (DFF) / Latches CNT0 CNT1 CNT2 CNT3 DFF0 DFF1 DFF2 CNT4 CNT5 CNT6 CNT7 DFF3 DFF5 DFF6 Pin 2 Pin 11 GPI GPIO Combination Function Macrocells Programmable 2-bit LUT2 0 3-bit LUT3 8 Delay or or Pin 3 Pin 10 DFF4 Pipe Delay GPIO GPIO RC Oscillator Look Up Tables (LUTs) 2-bit 2-bit 3-bit 2-bit 2-bit LUT2 1 LUT2 2 LUT3 3 LUT2 4 LUT2 5 Pin4 Pin 9 GPIO GND 3-bit 3-bit 3-bit 3-bit 3-bit Additional Logic Functions LUT3 0 LUT3 1 LUT3 2 LUT3 3 LUT3 4 3-bit 3-bit 3-bit 3-bit 4-bit FILTER 0 FILTER 1 LUT3 5 LUT3 6 LUT3 7 LUT3 9 LUT4 0 Pin 5 Pin 8 Pin 6 Pin 7 GPIO GPIO GPIO GPIO Silego Technology, Inc. Rev 1.03 000-0046170-103 Revised October 10, 2017 GPIO GPIO GPIO GPIOSLG46170 1.0 Overview The SLG46170 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46170. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The macrocells in the device include the following: Fifteen Combinatorial Look Up Tables (LUTs) Five 2-bit LUTs Nine 3-bit LUTs One 4-bit LUT Two Combination Function Macrocells One Selectable FF/Latch or 2-bit LUT One Selectable Pipe Delay or 3-bit LUT Pipe Delay 16 stage / 3 output Eight Counter / Delay Generators (CNT/DLY) One 14-bit delay/counter One 14-bit delay/counter with external clock/reset Four 8-bit delays/counters Two 8-bit delays/counters with external clock/reset Six D Flip-Flop / Latches (DFF) Pipe Delay 16 stage/3 output (Part of Combination Function Macrocell) Programmable Delay Additional Logic Functions 2 Deglitch Filters RC Oscillator (RC OSC) 000-0046170-103 Page 1 of 86