SLG46536VTR Dialog Semiconductor

SLG46536 GreenPAK Programmable Mixed-signal Matrix Features Pin Configuration Logic & Mixed Signal Circuits Highly Versatile Macrocells Read Back Protection (Read Lock) 1.8 V (5%) to 5 V (10%) Supply 1 12 Operating Temperature Range: -40C to 85C VDD GPIO RoHS Compliant / Halogen-Free 14 13 2 11 GPI GPIO 14-pin STQFN: 2 x 2.2 x 0.55 mm, 0.4 mm pitch 3 10 GPIO GPIO Applications 4 9 GPIO GND Personal Computers and Servers 6 7 PC Peripherals 5 8 GPIO GPIO Consumer Electronics Data Communications Equipment Handheld and Portable Electronics 14-pin STQFN (Top View) Block Diagram Pin 13 Pin 14 GPIO GPIO Pin 12 Pin 1 GPIO VDD Combination Function Macrocells Additional 4-bit LUT Logic LUT4 2 2-bit 2-bit 2-bit 2-bit Functions LUT2 0 LUT2 1 LUT2 2 LUT2 3 or DFF0 or DFF1 or DFF2 or PGEN Pin 11 RC Oscillator Pin 2 FITER 0 GPIO GPI with ACMP0 3bit 3-bit 3-bit 3-bit Edge 25M Oscillator LUT3 0 LUT3 1 LUT3 2 LUT3 3 Detect or DFF3 or DFF4 or DFF5 or DFF6 16x8 RAM 3-bit 3-bit 3-bit 3-bit FILTER 1 Memory LUT3 4 LUT3 11 LUT3 12 LUT3 13 with with or DFF7 or DFF8 or DFF9 or DFF10 Edge Pin 10 defined Pin 3 Detect GPIO NVM OTP ACMP1 GPIO initial state 3-bit 3-bit 3-bit 3-bit LUT3 14 LUT3 15 LUT3 16 LUT3 17 or DFF11 or DFF12 or DFF13 or DFF14 Programmable Delay 3-bit 3-bit 3-bit 4-bit LUT3 5 or LUT3 6 or LUT3 7 or LUT4 0 or POR CNT/DLY2 CNT/DLY3 CNT/DLY4 CNT/DLY0 ACMP2 Pin 9 2 I C Serial Pin 4 GND Communication 3-bit 3-bit 3-bit 4-bit GPIO LUT3 8 or LUT3 9 or LUT3 10 or LUT4 1 or CNT/DLY5 CNT/DLY6 Pipe Delay CNT/DLY1 Vref Crystal Oscillator Pin 5 Pin 8 GPIO GPIO Pin 6 Pin 7 SCL or SDA or GPIO GPIO Silego Technology, Inc. Rev 1.09 SLG46536 DS 109 Revised August 9, 2018 GPIO SCL/GPIO GPIO SDA/GPIOSLG46536 1.0 Overview The SLG46536 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46536. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The macrocells in the device include the following: Three Analog Comparators (ACMP) Twenty-six Combination Function Macrocells Three Selectable DFF/Latch or 2-bit LUTs One Selectable Continuous DFF/Latch or 3-bit LUT Eleven Selectable DFF/Latch or 3-bit LUTs One Selectable Pipe Delay or 3-bit LUT One Selectable Programmable Pattern Generator or 2-bit LUT Five 8-bit delays/counters or 3-bit LUTs Two 16-bit delays/counters or 4-bit LUTs Two Deglitch Filters with Edge Detectors Combinatorial Logic One 4-bit LUT Serial Communications 2 I C Protocol compliant 16x8 RAM Memory with defined NVM OTP initial state Pipe Delay 16 stage/3 output (Part of Combination Function Macrocell) Programmable Delay Two Oscillators (OSC) Configurable 25 kHz/2 MHz 25 MHz RC Oscillator Crystal Oscillator Power-On-Reset (POR) SLG46536 DS 109 Page 1 of 164