PI2DDR3212ZLEX Diodes Incorporated

PI2DDR3212 14 bit 2:1 DDR3 Switch Description Features 14 bit 2:1 switch that supports up to 5Gbps DDR3 signals This 14-bit DDR switch is designed for 1.5V or 1.8V supply voltage, SSTL_15 or SSTL_18 signaling and CMOS select input VDD 1.5V or 1.8V +/- 10% signals. It is designed for DDR2 or DDR3 memory bus with speed SEL and Global Enable up to 5Gbps. 220 A typ. operating current PI2DDR3212 has a 1:2 demux or 2:1 mux topology. All 14-bit High impedance and low Coff channel output when disabled channels can be switched to one of the two ports simultaneously or deselected with the SEL input. This device also allows all ports to be discon - Low R : 8 typical nected. ON 3dB Bandwidth: 2.7GHz PI2DDR3212 uses Pericoms proprietary high speed switch tech- PI6C20800B nology providing consistent high bandwidth across all channels, Low insertion loss: -0.6dB (0f1GHz) with very little insertion loss, cross-talk, and bit to bit skew. Low cross-talk for high speed channels: It is available in a 52-pin TQFN 3.5x9x0.4mm package and -18dB typ. (0<f<2GHz) 48-pin TFBGA 4.5x4.5x0.8mm package. The 48-pin version is Low bit-to-bit skew 20ps Max pin compatible with CBTW28DD14. ESD: 2KV HBM SSTL_15 or SSTL_18 signaling Packaging (Pb-free and Green) 52 pin TQFN (3.5x9x0.4mm) 48 pin TFBGA (4.5x4.5x0.8mm)pin compatible with CBTW28DD14 Pin Configuration (52-pin TQFN) GND 1 47 B11 EN 2 46 C11 45 A13 3 B10 44 A12 4 C10 5 43 A11 B9 6 42 VDD C9 7 41 A10 B8 A9 8 40 C8 A8 9 39 B7 A7 10 38 C7 GND 11 37 V DD A6 12 36 B6 A5 13 35 C6 A4 14 34 B5 33 A3 15 C5 16 32 VDD B4 17 31 A2 C4 A1 18 30 B3 A0 19 29 C3 SEL 20 28 B2 GND 21 27 C2 www.pericom.com P-0.1 07/06/12 1 C0 22 52 B13 B0 23 51 C13 C1 24 50 B12 B1 25 49 C12 GND 26 48 GND