ADVANCE INFORMATION - COMPANY CONFIDENTIAL PI3HDMI201 2:1 Active HDMI Compatible Switch with Optimized Equalization for Enhanced Signal Integrity Features Description Pericom Semiconductors PI3HDMI201 2:1 active switch circuit Supply voltage, V = 3.3V 5% DD is targeted for high-resolution video networks that are based Each Port can support DVI or HDMI signals on DVI/HDMI standards and TMDS signal processing. The Supports both AC-coupled and DC-coupled inputs PI3HDMI201 is an active 2 TMDS to 1 TMDS receiver switch Supports DeepColor with Hi-Z outputs. The device receives differential signals from High Performance, up to 2.5 Gbps per channel selected video components and drives the video display unit. It provides three controllable output swings. The allowable output Switching support for 3 side band signals swings are 500mV, 750mV and 1000mV. This solution also (SCL, SDA and HPD) provides a unique advanced pre-emphasis technique to increase 5V Tolerance on all side band signals rise and fall times which are reduced during transmission across SCL, SDA, and HPD pins are the only pins that can support long distances. HOT INSERTION Each complete HDMI/DVI channel also has slower speed, side Integrated 50-Ohm (10%) termination resistors at each high band signals, that are required to be switched. Pericoms solution speed signal input provides a complete solution by integrating the side band switch TMDS input termination control on all high speed inputs together with the high speed switch in a single solution. Using HDCP reset circuitry for quick communication when Equalization at the input of each of the high speed channels, switching from one port to another Pericom can successfully eliminate deterministic jitter caused by Con gurable output swing control long cables from the source to the sink. The elimination of the (500mV, 750mV, 1000mV) deterministic jitter allows the user to use much longer cables (up to 25 meters). Con gurable Pre-Emphasis levels (0dB, 1.5dB, 3.5dB, & 6.0dB) The maximum DVI/HDM Bandwidth of 2.5 Gbps provides 36- Con gurable De-Emphasis bit DeepColor support, which is offered by HDM revision 1.3. (0dB, -3.5dB, -6.0dB, -9.5dB) Due to its active uni-directional feature, this switch is designed for usage only for the video receivers side. For consumer video Optimized Equalization networks, the device sits at the receivers side to switch between Single default setting will support all cable lengths multiple video components, such as PC, DVD, STB, D-VHS, ESD spec on all input TMDS pins is 6kV per IEC61000-4-2 etc. The PI3HDMI201 also provides enhanced robust ESD/EOS Propagation delay 2ns protection of 6kV, which is required by many consumer video High Impedance Outputs when disabled networks today. Packaging (Pb-free & Green): 56-contact TQFN (ZF56) The Optimized Equalization provides the user a single optimal setting that can provide HDMI compliance in regards to jitter for all cable lengths: 1meter to 20meters and color depths of 8bit/ch, or 12bit/ch. Pericom also offers the ability to ne tune the equalization settings in situations where cable length is known. For example, if 25meter cable length is required, Pericom s solution can be adjusted to 16dB EQ to accept 25meter cable length. PS8957B 07/29/09 09-0017 1 All trademarks are property of their respective owners.ADVANCE INFORMATION - COMPANY CONFIDENTIAL PI3HDMI201 2:1 Active HDMI Compatible Switch with Optimized Equalization for Enhanced Signal Integrity Pin Con guration (Top View) VDD 1 48 VDD 2 47 HPD Sink D0-A SDA sink 3 46 D0+A SCL sink 4 45 GND GND D1-A 5 44 6 43 D1+A CLK- VDD 7 42 CLK+ D2-A 8 41 VDD 9 40 D0- D2+A 10 39 D0+ GND GND 11 38 CLK-B GND CLK+B 12 37 D1- D1+ 13 36 VDD 14 35 D0-B VDD 15 34 D2- D0+B 16 33 D2+ GND 17 32 D1-B GND 18 31 D1+B OC S0 19 30 VDD OC S1 D2-B 20 29 OC S2 Receiver Block Each input has integrated equalization that can eliminate deterministic jitter caused by 25meter 24AWG cables. All activity can be con gured using pin strapping. The Rx block is designed to receive all rel- TM evant signals directly from the HDMI connector without any additional circuitry, 3 High speed TMDS data, 1 pixel clock, 1 HPD signal, and DDC signals. TMDS channels have following termination scheme for Rx Sense support. AVdd R 2 250K-Ohm R 1 CLKx+/-, Dx+/- x = A or B 2 PS8957B 07/29/09 09-0017 All trademarks are property of their respective owners. D2+B 21 56 CLK+A 22 55 GND CLK-A 23 54 HPDB GND 53 24 SCL SDAB A 25 52 SCLB SDA A EQ S1 26 51 HPD A 50 SEL2 27 OE EQ S0 28 49 SEL1