PI4MSD5V9545A 4 Channel I2C bus Switch with Interrupt Logic and Reset Features Description 1-of-4 bidirectional translating multiplexer The PI4MSD5V9545A is a quad 1-of-4 bidirectional I2C-bus interface logic translating switch, controlled via the I2C bus. The Operating power supply voltage :1.65 V to 5.5 V SCL/SDA upstream pair fans out to four SCx/SDx Allows voltage level translation between 1.2V, downstream pairs, or channels. 1.8V,2.5 V, 3.3 V and 5 V buses Any individual SCx/SDx channel or combination of Low standby current channels can be selected, determined by the contents of Low Ron switches the programmable control register. Four interrupt inputs, Channel selection via I2C bus INT0 to INT3, one for each of the downstream pairs, are Power-up with all multiplexer channels deselected provided. One interrupt output, INT, acts as an AND of Capacitance isolation when channel disabled the four interrupt inputs. No glitch on power-up An active LOW reset input allows the PI4MSD5V- Supports hot insertion 9545A to recover from a situation where one of the 5 V tolerant inputs downstream buses is stuck in a LOW state. Pulling the 0 Hz to 400 kHz clock frequency RESET pin LOW resets the I2C bus state machine and ESD protection exceeds 8000 V HBM per JESD22- causes all the channels to be deselected as does the A114, and 1000 V CDM per JESD22-C101 internal power-on reset function. Latch-up testing is done to JEDEC Standard The pass gates of the switches are constructed such JESD78 which exceeds 100 mA that the VCC pin can be used to limit the maximum high Packages offered: TSSOP-20L voltage which will be passed by the PI4MSD5V9545A. This allows the use of different bus voltages on each pair, so that 1.2V,1.8 V or 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant. Pin Configuration TSSOP20 2015-07-0036 PT0526-4 8/18/15 1 PI4MSD5V9545A 4 Channel I2C bus Switch with Interrupt Logic and Reset Pin Description Pin No Pin Name Type Description 1 A0 Input address input 0 2 A1 Input address input 1 Input 3 active LOW reset pin RESET INT0 4 Input active LOW interrupt input 0 5 SD0 I/O serial data 0 6 SC0 I/O serial clock 0 INT1 7 Input active LOW interrupt input 1 I/O 8 SD1 serial data 1 9 SC1 I/O serial clock 1 Ground 10 GND supply ground Input 11 active LOW interrupt input 2 INT2 12 SD2 I/O serial data 2 I/O 13 SC2 serial clock 2 14 Input active LOW interrupt input 3 INT3 15 SD3 I/O serial data 3 16 SC3 I/O serial clock 3 17 INT Output active LOW interrupt output I/O 18 SCL serial clock line 19 SDA I/O serial data line Power 20 VCC Supply Power 2015-07-0036 PT0526-4 8/18/15 2