PI5USB31213XEAEX Diodes Incorporated

PI5USB31213 USB 3.1 GEN2 10Gbps Mux/Demux Switch with I2C Control for Type-C Connector Features Description Applications Block Diagram Pin Configuration Figure2. PI5USB31213 Block diagram Figure 1 Pin Assignment (Top View) PI5USB31213 www.diodes.com March 2018 Document Number DS40847 Rev 1-3 Diodes Incorporated 1 PI5USB31213 Pin Descriptions Pin Number Pin Name I/O Description 2 I C communication clock signal. Dual function as open drain Type-C Current Mode Detect 1 in pin control mode when port is a device 1 SCL/OUT2 I/O OUT2 OUT1 Current Mode Hi-Z Hi-Z Default Hi-Z Low Medium Low Low High 2 Open drain output. In I C control mode, this is an active LOW interrupt signal 2 for indicating changes in I C registers. 2 INTB/OUT3 O Dual function as analog audio adapter detection in pin control mode: OUT3=Hi-Z Not detected OUT3=Low Analog audio adapter detected Tri-level input pin to indicate port mode (for pin control only): PORT is floating Try.SNK Dual Role (DRP) 3 PORT I PORT=VDD Host (SRC) PORT=GND Device (SNK) 4 Ap I/O Differential USB 3.1 GEN2 signal A (PHY side) 5 An I/O Differential USB 3.1 GEN2 signal A (PHY side) 6 VDD Power Positive supply voltage from VBAT 7 Bn I/O Differential USB 3.1 GEN2 signal B (PHY side) 8 Bp I/O Differential USB 3.1 GEN2 signal B (PHY side) Open drain output. Asserted low when CC pin detected device attachment 9 ID O when port is a Host (or dual-role acting as Host), otherwise ID is hi-z. 10 VCONN Power Supply voltage for VCONN 11 CC1 I/O Type-C Configuration channel signals 12 CC2 I/O Type-C Configuration channel signals Active-low enable input pin (with internal weak pull up) 13 ENB I ENB=VDD Disabled/Low Power State ENB=GND Enabled/Active State 14 B1p I/O Differential USB 3.1 GEN2 signal B for position 1 connection 15 B1n I/O Differential USB 3.1 GEN2 signal B for position 1 connection 16 A1p I/O Differential USB 3.1 GEN2 signal A for position 1 connection 17 A1n I/O Differential USB 3.1 GEN2 signal A for position 1 connection 18 B2n I/O Differential USB 3.1 GEN2 signal B for position 2 connection 19 B2p I/O Differential USB 3.1 GEN2 signal B for position 2 connection 20 A2n I/O Differential USB 3.1 GEN2 signal A for position 2 connection 21 A2p I/O Differential USB 3.1 GEN2 signal A for position 2 connection 2 Tri-level input pin to indicate I C address or pin control mode: ADDR is floating Pin control mode 22 ADDR I 2 ADDR=VDD I C enabled with ADDR bit 6 equal to 1 2 ADDR=GND I C enabled with ADDR bit 6 equal to 0 23 VBUSDET I VBUS detection 2 I C communication data signal. Dual function as open drain Type-C Current Mode Detect 1 in pin control mode when port is a device 24 SDA/OUT1 I/O OUT2 OUT1 Current Mode Hi-Z Hi-Z Default Hi-Z Low Medium Low Low High Thermal Pad GND Ground Ground PI5USB31213 www.diodes.com March 2018 Document Number DS40847 Rev 1-3 Diodes Incorporated 2