PI6C485311 3.3V Low Skew 1-to-2 Differential to LVPECL Fanout Buffer Features Description Pin-to-pin compatible to ICS85311 The PI6C485311 is a high-performance low-skew LVPECL fanout Maximum operation frequency: 800MHz buffer. PI6C485311 features two selectable differential inputs and translates to four LVPECL ultra-low jitter outputs. The inputs 2 pair of differential LVPECL outputs can also be con gured to single-ended with external resistor bias CLK, CLK pair accepts LVDS, LVPECL, LVHSTL, n circuit. The CLK input accepts LPECL or LVDS or LVHSTL or SSTL and HCSL input level SSTL or HCSL signals, and PCLK input accepts LVPECL or SSTL Output Skew: 100ps (maximum) or CML signals. PI6C485311 is ideal for differential to LVPECL Part-to-part skew: 150ps (maximum) translations and/or LVPECL clock distribution. Typical clock translation and distribution applications are data-communications Propagation delay: 2ns (maximum) and telecommunications. 3.3V power supply o o Operating Temperature: -40 C to 85 C Packaging (Pb-free & Green avaliable): - 8-pin SOIC (W) Block Diagram Pin Diagram Q0 1 V Q0 8 CC Q n 0 2 nQ0 7 CLK CLK CLK n Q1 3 6 nCLK Q 1 Q n 1 4 V nQ1 5 EE PS8865D 11/14/06 1 06-0283PI6C485311 3.3V Low Skew 1-to-2 Differential to LVPECL Fanout Buffer Pin Description Name Pin Type Description V 5 P Connect to Negative power supply EE CLK 7 I PD Non-inverting differential clock input CLK 6 I PU Inverting differential clock input n V 8 P Connect to 3.3V. CC Q , Q 3.4 O Differential output pair, LVPECL interface level. 1 n 1 Q , Q 1,2 O Differential output pair, LVPECL interface level. 0 n 0 Note: 1. I = Input, O = Output, P = Power supply connection, I PD = Input with pull down, I PU = Input with pull up Pin Characteristics Symbol Parameter Conditions Min. Typ. Max. Units C Input Capacitance 4 pF IN R pullup Input Pullup Resistance 50 K R pulldown Input Pulldown Resistance 50 (1) Absolute Maximum Ratings Symbol Parameter Conditions Min. Typ. Max. Units V Supply voltage Referenced to GND 4.6 CC V Input voltage Referenced to GND -0.5 V +0.5V V IN CC V Output voltage Referenced to GND -0.5 V +0.5V OUT CC o T Storage temperature -65 150 C STG Note: 1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress speci cations only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of the speci cations is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. P8865D 11/14/06 2 06-0283