PI6C49S1504 High Performance Selectable 1:4 Differential Fanout Buffer Features Description 4 differential outputs with 2 banks e PTh I6C49S1504 is a high performance fanout buffer device - which supports up to 1.5GHz frequency. The device also uses User configurable output signaling standard for each bank: Pericom s proprietary input detection technique to make sure LVDS or LVPECL or HCSL illegal input conditions will be detected and reefl cted by output LVCMOS reference output up to 200MHz states. This device is ideal for systems that need to distribute low Up to 1.5GHz output frequency for differential outputs jitter clock signals to multiple destinations. Ultra low additive phase jitter: < 0.03 ps (typ) (differential 156.25MHz, 12KHz to 20MHz integration range) Selectable reference inputs support either single-ended Applications or differential or Xtal Networking systems including switches and Routers Low skew between outputs within banks (<40ps) High frequency backplane based computing and telecom Low delay from input to output (Tpd typ. < 1.5ns) platforms Separate Input output supply voltage for level shifting 2.5V / 3.3V power supply Industrial temperature support TSSOP-28 package Block Diagram Pin Configuration (28-Pin TSSOP) 28 VEE/GND 1 QA0 OPMODEA 1:0 NC 2 27 nQA0 QA 0:1 CLK SEL0 26 3 VDDO 2 25 CLK SEL1 4 OpModeA0 X1 OSC X2 24 CLK0 5 OpModeA1 OPMODEB 1:0 CLK0 23 nCLK0 nCLK0 6 QA1 QB 0:1 2 CLK1 7 22 nQA1 CLK1 nCLK1 Ref out nCLK1 8 21 Ref Out QB0 20 Xtal In 9 CLK SEL 1:0 Sync OE nQB0 Sync 19 Xtal Out 10 Iref OpModeB1 Sync OE 18 11 17 OpModeB0 IREF 12 16 VDDO VDD 13 15 QB1 nQB1 14 PI6C6C49S1504 Rev B www.diodes.com October 2016 1 16-0197 Diodes IncorporatedPI6C49S1504 Pinout Table Pin Pin Name Type Description 1 V Power Negative power supply EE 2 NC - No Connect 3 CLK SEL0 Input Clock input source selection pin 4 CLK SEL1 Input Clock input source selection pin CLK0 5, 6 Input Differential clock input nCLK0 CLK1 7, 8 Input Differential clock input nCLK1 9 XTAL In Input Xtal input pin 10 XTAL Out Output Xtal output pin 11 Sync OE Input Synchronous output enable for Ref Out, see Table 3 for functions 12 IREF Output External 475 resistor connection to set differential output current 13 V Power Power supply for core DD nQB1 14, 15 Output Differential output clock QB1 16, 26 V Power Power supply for outputs DDO 17 OpModeB0 Input Bank B output clock type selection pin 18 OpModeB1 Input Bank B output clock type selection pin nQB0 19, 20 Output Differential output clock QB0 21 Ref Out Output Reference output clock nQA1 22, 23 Output Differential output clock QA1 24 OpModeA1 Input Bank A output clock type selection pin 25 OpModeA0 Input Bank A output clock type selection pin nQA0 27, 28 Output Differential output clock QA0 PI6C6C49S1504 Rev B www.diodes.com October 2016 2 16-0197 Diodes Incorporated