PI6C49X0201 1-To-1 Differential-to-LVCMOS/LVTTL Translator Features Description One LVCMOS/LVTTL output The PI6C49X0201 is a 1-to-1 Differential-to-LVCMOS/LVTTL Translator High Performance Buffer. The differential input is Differential CLK/nCLK input pair highly flexible and can accept LVPECL, LVDS, LVHSTL, SSTL, CLK/nCLK pair can accept the following differential input and HCSL. The small 8-lead SOIC footprint makes this device levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ideal for use in applications with limited board space. Output frequency: 360MHz Part-to-part skew: 500ps (maximum) Additive phase jitter, RMS: 0.09ps (typical), 3.3V output Full 3.3V and 2.5V operating supply -40C to 85C ambient operating temperature Block Diagram Pin Assignment VDD nc 1 8 Pulldown CLK CLK 2 7 Q0 Q0 Pullup nCLK nc nCLK 3 6 GND 4 5 nc www.pericom.com PI6C49X0201 Rev A 07/16/13 13-0112 1PI6C49X0201 1-TO-1 Differential- To-LVCMOS/LVTTL Translator Pin Descriptions Pin Pin Name Pin Type Pin Description 1, 4, 6 nc Unused No connect. 2 CLK Input Pulldown Non-inverting differential clock input. Pullup 3 nCLK Input Inverting differential clock input. 5 GND Power Power supply ground. 7 Q0 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 8 VDD Power Positive supply pin. Note: Pullup and Pulldown refer to internal input resistors. Pin Characteristics Symbol Parameter Test Conditions Min. Typical Max. Units C Input Capacitance 4 pF IN R Input Pullup Resistor 51 k PULLUP R Input Pulldown Resistor 51 k PULLDOWN C Power Dissipation Capacitance VDD = 3.6V 23 pF PD R Output Impedance 5 7 13 OUT www.pericom.com PI6C49X0201 Rev A 07/16/13 13-0112 2