REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Table I, pages 4 and 5, change: V from 2.5 V to 2.4 V. f (Min), subgroup 9, 87-07-24 D. R. Cool OH MAX from 100 MHz to 90 MHz and subgroups 10 and 11 from 90 MHz to 75 MHz. t , subgroups 10 and 11 from 15.5 ns to 16.5 ns. Add5962 to the military PLH4 drawing number in 6.4. Editorial changes on pages 2 and 8. Change code ident. to 67268. B Technical changes in 1.4, recommended operating conditions. Increased setup 89-01-03 D. R. Cool and hold time. Delete footnote 2/ from table I. Table I f test from 75 MHz to 60 MAX MHz. Table I t through t increase maximum limits. Made editorial changes PHL2 PHL4 throughout document. Change in table II. Add CAGE 27014 to all packages. Add figure 5. - ltg C Table I, maximum clock frequency, symbol column, add2. Add footnote 2/ at 93-05-05 Monica L. Poelking the end of the table as follows:2/ f , if not tested shall be guaranteed to the MAX specified limits - tvn D 02-03-07 Raymond Monnin Update to reflect latest changes in format and requirements. Change LOAD to PE on Figure 4. Editorial changes throughout. - les E Update drawing to current requirements. Editorial changes throughout. - gap 09-04-14 Joseph D. Rodenbeck CURRENT CAGE CODE IS 67268 The original first sheet of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY David W. Queenan DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 STANDARD CHECKED BY 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86072 01 E X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F169 synchronous 4-bit up/down binary counter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or GDIP2-T16 16 Dual-in-line F GDFP2-F16 or GDFP3-F16 16 Flat 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage .................................................................................... -0.5 V dc minimum to +7.0 V dc maximum Input voltage range ............................................................................ -1.2 V dc at -18 mA to +7.0 V dc Storage temperature range ................................................................ -65C to +150 C ) per device 1/ ................................ 413 mW Maximum power dissipation (PD Lead temperature (soldering, 10 seconds) ........................................ +300 C Thermal resistance, junction-to-case ( ) ........................................ See MIL-STD-1835 JC Junction temperature (T ) .................................................................. +175 C J 1.4 Recommended operating conditions. Supply voltage range (V ) ................................................................ +4.5 V dc minimum to +5.5 V dc maximum CC Minimum high level input voltage (V ) ............................................... 2.0 V dc IH Maximum low level input voltage (VIL) ............................................... 0.8 V dc Case operating temperature range (T ) ............................................ -55 C to +125 C C Minimum setup time, D to CP: n T = +25 C ..................................................................................... 4.0 ns C T = -55 C, +125 C ........................................................................ 4.5 ns C Minimum hold time, D to CP: n T = +25 C ..................................................................................... 3.0 ns C T = -55 C, +125 C ........................................................................ 3.5 ns C 1/ Maximum power dissipation is defined as V x I . Must withstand the added P due to short circuit test (e.g. I ). CC CC D OS SIZE STANDARD 5962-86072 A MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS REVISION LEVEL SHEET COLUMBUS, OHIO 43218-3990 E 2 DSCC FORM 2234 APR 97