MC14517B Dual 64-Bit Static Shift Register The MC14517B dual 64bit static shift register consists of two identical, independent, 64bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, regardless of the state of the write MC14517B FUNCTIONAL TRUTH TABLE (X = Dont Care) Write Enable Clock Data 16Bit Tap 32Bit Tap 48Bit Tap 64Bit Tap 0 0 X Content of 16Bit Content of 32Bit Content of 48Bit Content of 64Bit Displayed Displayed Displayed Displayed 0 1 X High Impedance High Impedance High Impedance High Impedance 1 0 X Content of 16Bit Content of 32Bit Content of 48Bit Content of 64Bit Displayed Displayed Displayed Displayed 1 1 X High Impedance High Impedance High Impedance High Impedance 0 Data entered Content of 16Bit Content of 32Bit Content of 48Bit Content of 64Bit into 1st Bit Displayed Displayed Displayed Displayed 1 Data entered Data at tap Data at tap Data at tap High Impedance into 1st Bit entered into 17Bit entered into 33Bit entered into 49Bit 0 X Content of 16Bit Content of 32Bit Content of 48Bit Content of 64Bit Displayed Displayed Displayed Displayed 1 X High Impedance High Impedance High Impedance High Impedance ELECTRICAL CHARACTERISTICS (Voltages Referenced to V ) SS 55 C 25 C 125 C V Typ DD (Note 2) Min Max Min Max Min Max Characteristic Symbol Vdc Unit Output Voltage 0 Level V 5.0 0.05 0 0.05 0.05 Vdc OL V = V or 0 10 0.05 0 0.05 0.05 in DD 15 0.05 0 0.05 0.05 1 Level V 5.0 4.95 4.95 5.0 4.95 Vdc OH V = 0 or V in DD 10 9.95 9.95 10 9.95 15 14.95 14.95 15 14.95 Input Voltage 0 Level V Vdc IL (V = 4.5 or 0.5 Vdc) 5.0 1.5 2.25 1.5 1.5 O (V = 9.0 or 1.0 Vdc) 10 3.0 4.50 3.0 3.0 O (V = 13.5 or 1.5 Vdc) 15 4.0 6.75 4.0 4.0 O 1 Level V Vdc IH (V = 0.5 or 4.5 Vdc) O 5.0 3.5 3.5 2.75 3.5 (V = 1.0 or 9.0 Vdc) O 10 7.0 7.0 5.50 7.0 (V = 1.5 or 13.5 Vdc) O 15 11 11 8.25 11 Output Drive Current I mAdc OH (V = 2.5 Vdc) Source 5.0 3.0 2.4 4.2 1.7 OH (V = 4.6 Vdc) 5.0 0.64 0.51 0.88 0.36 OH (V = 9.5 Vdc) 10 1.6 1.3 2.25 0.9 OH (V = 13.5 Vdc) 15 4.2 3.4 8.8 2.4 OH (V = 0.4 Vdc) Sink OL I 5.0 0.64 0.51 0.88 0.36 mAdc OL (V = 0.5 Vdc) OL 10 1.6 1.3 2.25 0.9 (V = 1.5 Vdc) OL 15 4.2 3.4 8.8 2.4 Input Current I 15 0.1 0.00001 0.1 1.0 Adc in Input Capacitance (V = 0) C 5.0 7.5 pF in in Quiescent Current (Per Package) I 5.0 5.0 0.005 5.0 150 Adc DD 10 10 0.010 10 300 15 20 0.015 20 600 Total Supply Current (Note 3, 4) I 5.0 I = (4.2 A/kHz) f + I Adc T T DD (Dynamic plus Quiescent, 10 I = (8.8 A/kHz) f + I T DD Per Package) 15 I = (13.7 A/kHz) f + I T DD (C = 50 pF on all outputs, all L buffers switching) ThreeState Leakage Current I 15 0.1 0.0001 0.1 3.0 Adc TL Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Data labelled Typ is not to be used for design purposes but is intended as an indication of the ICs potential performance. 3. The formulas given are for the typical characteristics only at 25 C. 4. To calculate total supply current at loads other than 50 pF: I (C ) = I (50 pF) + (C 50) Vfk where: I is in A (per package), C in pF, T L T L T L V = (V V ) in volts, f in kHz is input frequency, and k = 0.004. DD SS