MC14029B Binary/Decade Up/Down Counter The MC14029B Binary/Decade up/down counter is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. The counter consists of type D flipflop www.onsemi.com stages with a gating structure to provide toggle flipflop capability. The counter can be used in either Binary or BCD operation. This complementary MOS counter finds primary use in up/down and difference counting and frequency synthesizer applications where low power dissipation and/or high noise immunity is desired. It is also SOIC16 useful in A/D and D/A conversion and for magnitude and sign D SUFFIX generation. CASE 751B Features MARKING DIAGRAM Diode Protection on All Inputs 16 Supply Voltage Range = 3.0 Vdc to 18 Vdc Internally Synchronous for High Speed 14029BG AWLYWW Logic EdgeClocked Design Count Occurs on Positive Going Edge of Clock 1 Asynchronous Preset Enable Operation A = Assembly Location Capable of Driving Two LowPower TTL Loads or One LowPower WL = Wafer Lot YY, Y = Year Schottky TTL Load Over the Rated Temperature Range WW = Work Week Pin for Pin Replacement for CD4029B G = PbFree Indicator NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ100 ORDERING INFORMATION Qualified and PPAP Capable See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. This Device is PbFree and is RoHS Compliant MAXIMUM RATINGS (Voltages Referenced to V ) SS Symbol Parameter Value Unit V DC Supply Voltage Range 0.5 to +18.0 V DD V , V Input or Output Voltage Range (DC or Transient) 0.5 to V + 0.5 V in out DD I , I Input or Output Current (DC or Transient) per Pin 10 mA in out P Power Dissipation, per Package (Note 1) 500 mW D T Ambient Temperature Range 55 to +125 C A T Storage Temperature Range 65 to +150 C stg T Lead Temperature (8Second Soldering) 260 C L Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Temperature Derating: D/DW Packages: 7.0 mW/ C From 65 C To 125 C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V and V in out should be constrained to the range V (V or V ) V . SS in out DD Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V or V ). Unused outputs must be left open. SS DD Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: March, 2015 Rev. 10 MC14029B/DMC14029B PIN ASSIGNMENT PE 1 16 V DD Q3 2 15 CLK P3 3 14 Q2 P0 4 13 P2 C 5 12 P1 in Q0 6 11 Q1 C 7 10 U/D out V 8 9 B/D SS TRUTH TABLE Carry In Up/Down Preset Enable Action 1 X 0 No Count 0 1 0 Count Up 0 0 0 Count Down X X 1 Preset X = Dont Care ORDERING INFORMATION Device Package Shipping MC14029BDR2G SOIC16 2500 Units / Tape & Reel (PbFree) NLV14029BDR2G* SOIC16 2500 Units / Tape & Reel (PbFree) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ100 Qualified and PPAP Capable. www.onsemi.com 2