REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R04893. 92-12-09 M. A. Frye B Changes in accordance with NOR 5962-R07193. 93-01-22 M. A. Frye C Added one device type, made format changes, and editorial changes 94-01-27 M. A. Frye throughout. D Boilerplate update, part of 5 year review. - ksr 07-02-21 Joseph Rodenbeck E Updated 1.2.1. Updated 4.2c. Updated boilerplate to current requirements. 12-07-27 Charles F. Saffle Added CAGE Code 0C7V7. - lhl F Update to current MIL-PRF-38535 requirements. llb 18-04-12 Charles F. Saffle REV SHEET REV SHEET REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY DLA LAND AND MARITIME Kenneth S. Rice COLUMBUS, OHIO 43218-3990 STANDARD CHECKED BY 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89840 01 L A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function Access time 01 20V8-30 20-input, 8-output, EE CMOS, architecturally 30 generic, programmable AND-OR array 02 20V8-20 20-input, 8-output, EE CMOS, architecturally 20 generic, programmable AND-OR array 03 20V8-15 20-input, 8-output, EE CMOS, architecturally 15 generic, programmable AND-OR array 04 20V8-10 20-input, 8-output, EE CMOS, architecturally 10 generic, programmable AND-OR array 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package 3 CQCC1-N28 28 Square chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range .................................................................................... -0.5 V dc to +7.0 V dc Input voltage range applied .......................................................................... -2.5 V dc to VCC + 1.0 V dc 1/ Off-state output voltage range applied ......................................................... -2.5 V dc to V + 1.0 V dc 1/ CC Storage temperature range .......................................................................... -65 C to +150 C Maximum power dissipation (PD) 2/ .............................................................. 1.5 W Lead temperature (soldering, 10 seconds) ................................................... +260 C Thermal resistance, junction-to-case ( JC) .................................................... See MIL-STD-1835 Junction temperature (T ) ............................................................................. +175 C J Data retention ............................................................................................... 10 years (minimum) Endurance .................................................................................................... 100 erase/write cycles (minimum) 1/ Minimum input voltage is -0.5 V dc which may undershoot to -2.5 V dc for pulses less than 20 ns. 2/ Must withstand the added P due to short circuit test, e.g., I . D OS SIZE STANDARD 5962-89840 A MICROCIRCUIT DRAWING DLA LAND AND MARITIME REVISION LEVEL SHEET COLUMBUS, OHIO 43218-3990 F 2 DSCC FORM 2234 APR 97