REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added K package. Added 04 device, two suppliers and 05 device, 91 04 19 M. A. Frye one supplier. Added vendor CAGE 34335 for devices 01L, 013, and 02L. Editorial changes throughout. Added vendor CAGE 34335 for devices 01K, 023, and 02K. Redrawn. B Added vendor CAGE 65786 for devices 01, 02, 03, 04, and 05LX, 93 01 28 M. A. Frye KX, and 3X. Added vendor CAGE 18324 for devices 01, 02, 04, and 05LX. IAW NOR 5962-R079-93. C Added 06 device for one supplier. Added test t to table I. 93 07 30 M. A. Frye SU2 Editorial changes throughout. Redrawn. D Added devices 07-14, Added CAGE 1FN41 for devices 13 and 14, 97 03 04 Raymond Monnin added test I to table I for devices 13 and 14, and updated text to CCSB newer boiler plate. E Changes in accordance with NOR 5962-R263-97 97 04 23 Raymond Monnin F Changes in accordance with NOR 5962-R341-97 97 06 05 Raymond Monnin G Added powerup-reset parameters to table I, and the waveform as 98 07 10 Raymond Monnin figure 5. Updated boilerplate. ksr H Changed minimum IOS value for devices 01 thru 06 on table I. 99 03 19 Raymond Monnin Value was changed from -50 mA to -30 mA. ksr J Updated boiler plate. ksr 02 - 10 - 10 Raymond Monnin REV SHEET REV J J J SHEET 15 16 17 REV STATUS REV J J J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 CHECKED BY STANDARD 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89841 01 K X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Access time 01, 07 22V10 22-input, 10-output, EECMOS, architecturally 30 generic, programmable AND-OR array 02, 08 22V10 22-input, 10-output, EECMOS, architecturally 20 generic, programmable AND-OR array 03, 09 22V10 22-input, 10-output, EECMOS, architecturally 15 generic, programmable AND-OR array 04, 10 22V10 22-input, 10-output, EECMOS, architecturally 25 generic, programmable AND-OR array 05, 11 22V10 22-input, 10-output, EECMOS, architecturally 15 generic, programmable AND-OR array (higher tCO, lower fCLK2) 06, 12 22V10 22-input, 10-output, EECMOS, architecturally 10 generic, programmable AND-OR array 13 22V10L 22-input, 10-output, EECMOS, architecturally 25 generic, programmable AND-OR array 14 22V10L 22-input, 10-output, EECMOS, architecturally 20 generic, programmable AND-OR array 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 flat pack L GDIP3-T24 or CDIP4-T24 24 dual-in-line 3 CQCC1-N28 28 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range------------------------------------------------------- -0.5 V dc to +7.0 V dc Input voltage applied ------------------------------------------------------ -0.5 V dc to VCC +1.0 V dc 1/ Off-state output voltage applied ----------------------------------------- -0.5 V dc to VCC +1.0 V dc 1/ Storage temperature range (TSTG) ------------------------------------ -65C to +150C Maximum power dissipation (PD) 2/ ----------------------------------- 1.5 W Lead temperature (soldering, 10 seconds) (TSOL) ---------------- +260C Thermal resistance, junction-to-case (JC) ------------------------- See MIL-STD-1835 Junction temperature (TJ) ------------------------------------------------- +175C Data retention----------------------------------------------------------------- 10 years (minimum) Endurance -------------------------------------------------------------------- 100 erase/write cycles (minimum) 1/ Minimum voltage is -0.5 V which may undershoot to -2.5 V for pulses of less than 20 ns. 2/ Must withstand the added PD due to short circuit test e.g., IOS. SIZE STANDARD 5962-89841 MICROCIRCUIT DRAWING A DEFENSE SUPPLY CENTER COLUMBUS REVISION LEVEL SHEET COLUMBUS, OHIO 43216-5000 J 2 DSCC FORM 2234 APR 97